cxl_switch_decoder_alloc(9)
πΈ cxl_switch_decoder_alloc(9) β Kernel API Manual, bestie edition πΈ
okay so welcome to the Kernel API Manual page for cxl_switch_decoder_alloc β yes the name is a mouthful, no we are not changing it, it's iconic actually π
β¨ NAME β¨
cxl_switch_decoder_alloc β allocate a switch level decoder π
β¨ SYNOPSIS β¨
struct cxl_switch_decoder * cxl_switch_decoder_alloc (struct cxl_port
*port , unsigned int nr_targets );
like... that's the whole vibe. two args, one struct pointer back. slay.
β¨ ARGUMENTS β¨
portβ the owning CXL switch port of this decoder π she's the main character, everything hangs off her.nr_targetsβ the max number of dynamically addressable downstream targets. lowkey the ceiling on how many friends this decoder can have fr fr.
β¨ RETURN β¨
You get back a brand new cxl decoder, the kind that's meant to be registered by cxl_decoder_add. π¦
It also brings a topology and the HDM Decoder Capability along with it β no cap. And heads up bestie, this includes the decoders that sit between Switch Upstream Ports / Switch Downstream Ports and Host Bridges / Root Ports. yes, all of those. the whole friend group π
β¨ SEE ALSO β¨
Kernel file ./drivers/cxl/core/port.c π and honestly the entire cxl cinematic universe:
cxl core(9)devm_cxl_add_port(9)devm_cxl_add_dport(9)devm_cxl_add_rch_dport(9)cxl_add_ep(9)find_cxl_port_by_dport(9)find_cxl_port_by_uport(9)cxl_decoder_init(9)cxl_root_decoder_alloc(9)cxl_endpoint_decoder_alloc(9)cxl_decoder_add_locked(9)cxl_decoder_add(9)__cxl_driver_register(9)cxl_endpoint_get_perf_coordinates(9)
like, read them all. iykyk π
and that's the page!! mwah π«Ά this lil cutie lives in ./drivers/cxl/core, dated October 2026, and answers to cxl_switch_decoder_alloc(9) β go off bestie, allocate responsibly β¨ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms