create_timings_aligned(9)

✨ create_timings_aligned(9) ✨

okay so bestie, this is the Kernel API Manual page for create_timings_aligned(9) — yes, the manual-name situation is handled right here at the top, no need to copy the header line like a boring spreadsheet 💅

🌸 NAME 🌸

create_timings_aligned — create register values and align with standard ✨

🦋 SYNOPSIS 🦋

int create_timings_aligned (struct exynos5_dmc *dmc , u32
*reg_timing_row , u32 *reg_timing_data , u32 *reg_timing_power , u32
clk_period_ps );

🎀 ARGUMENTS 🎀

• dmc — the device for which the frequency is going to be set, lowkey the main character of this call.
• reg_timing_row — an array to fill with values for the timing row register. fill it up, bestie 🫶
• reg_timing_data — an array to fill with values for the timing data register.
• reg_timing_power — an array to fill with values for the timing power register.
• clk_period_ps — the period of the clock, known as tCK ✨

💖 DESCRIPTION 💖

so this function calculates timings and creates a register value that's ready for a frequency transition. the register contains a few timings, and they're shifted by a known offset. the timing value is calculated based on the memory specyfication: the minimal time required and the minimal cycles required. it's giving "math but make it memory-timing vibes" 😭🔥

🌈 SEE ALSO 🌈

the kernel file stuff lives in ./drivers/memory/samsung/exynos5422-dmc.c, and these are the related besties you might wanna peek at:

• struct dmc_opp_table(9)
• struct exynos5_dmc(9)
• find_target_freq_idx(9)
• exynos5_switch_timing_regs(9)
• exynos5_init_freq_table(9)
• exynos5_set_bypass_dram_timings(9)
• exynos5_dram_change_timings(9)
• exynos5_dmc_align_target_voltage(9)
• exynos5_dmc_align_bypass_voltage(9)
• exynos5_dmc_align_bypass_dram_timings(9)
• exynos5_dmc_switch_to_bypass_configuration(9)
• exynos5_dmc_change_freq_and_volt(9)
• exynos5_dmc_get_volt_freq(9)
• exynos5_dmc_target(9)
• exynos5_counters_get(9)
• exynos5_dmc_start_perf_events(9)
• exynos5_dmc_perf_events_calc(9)
• exynos5_dmc_perf_events_check(9)
• exynos5_dmc_enable_perf_events(9)
• exynos5_dmc_disable_perf_events(9)
• exynos5_dmc_get_status(9)
• exynos5_dmc_get_cur_freq(9)
• exynos5_dmc_align_init_freq(9)
• of_get_dram_timings(9)
• exynos5_dmc_init_clks(9)
• exynos5_performance_counters_init(9)
• exynos5_dmc_set_pause_on_switching(9)
• exynos5_dmc_probe(9)
• exynos5_dmc_remove(9)

mwah 💋 source/version: ./drivers/memory/samsung; date: October 2026; create_timings_aligned(9) is signing off 🫶✨