exynos5_set...dram_timings(9)
π exynos5_set...dram_timings(9) β the Kernel API Manual, section 9, bestie β¨
Okay so this page lives in the Kernel API Manual, section 9, and the function's full name is honestly serving exynos5_set_bypass_dram_timings even though the page header abbreviates it all cute like exynos5_set...dram_timings(9). We love an ellipsis moment. π
β¨ NAME β¨
exynos5_set_bypass_dram_timings β low-level changes of the DRAM timings. That's it, that's the whole vibe. π¦
πΈ SYNOPSIS πΈ
void exynos5_set_bypass_dram_timings (struct exynos5_dmc *dmc );
No return value, it's a void girlie. She just does the thing. π
π ARGUMENTS π
dmcβ the device that the new settings are gonna be applied to. Like, hand her the device, she does the rest. π«Ά
π DESCRIPTION π
So this is a low-level function for changing the timings for DRAM memory clocking, and β okay, real talk β the original sentence kind of just stops at "from", so we're not gonna pretend otherwise. What we do know, no cap, is this: it uses timing bank registers set 1. That's the whole description. Short queen, iconic queen. π
Lowkey a reminder that this is low-level business β it's doing register-level timing stuff, not vibing at the application layer. π
β SEE ALSO β
The kernel file ./drivers/memory/samsung/exynos5422-dmc.c, plus this whole friend group right here β every single one, in order, no skips:
struct dmc_opp_table(9)struct exynos5_dmc(9)find_target_freq_idx(9)exynos5_switch_timing_regs(9)exynos5_init_freq_table(9)exynos5_dram_change_timings(9)exynos5_dmc_align_target_voltage(9)exynos5_dmc_align_bypass_voltage(9)exynos5_dmc_align_bypass_dram_timings(9)exynos5_dmc_switch_to_bypass_configuration(9)exynos5_dmc_change_freq_and_volt(9)exynos5_dmc_get_volt_freq(9)exynos5_dmc_target(9)exynos5_counters_get(9)exynos5_dmc_start_perf_events(9)exynos5_dmc_perf_events_calc(9)exynos5_dmc_perf_events_check(9)exynos5_dmc_enable_perf_events(9)exynos5_dmc_disable_perf_events(9)exynos5_dmc_get_status(9)exynos5_dmc_get_cur_freq(9)exynos5_dmc_align_init_freq(9)create_timings_aligned(9)of_get_dram_timings(9)exynos5_dmc_init_clks(9)exynos5_performance_counters_init(9)exynos5_dmc_set_pause_on_switching(9)exynos5_dmc_probe(9)exynos5_dmc_remove(9)
Like, the whole squad. Read them all. π₯
And that's the page, bestie! This little gem comes to you from ./drivers/memory/samsung, dated October 2026, and it's exynos5_set...dram_timings(9) forever and always. Go forth and change those timings responsibly. πβ¨ππ¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms