VASY(1)

πŸ“¦ version 5.1.1, in fedora 43, fedora 44

πŸ’– VASY πŸ’– β€” the VHDL Analyzer for Synthesis, bestie edition

okay so real talk: this is VASY(1) from the CAO-VLSI Reference Manual, and she is that girl. Let's get into it. πŸ¦‹


🌸 NAME 🌸

VASY β€” VHDL Analyzer for Synthesis. yeah. that's her whole job. πŸ’…


πŸ›οΈ ORIGIN πŸ›οΈ

so this absolute icon belongs to the ALLIANCE CAD SYSTEM, built by the ASIM team at the LIP6 laboratory of UniversitΓ© Pierre et Marie CURIE, in Paris, France. Paris!! of course she's chic. πŸ₯βœ¨


✨ SYNOPSIS ✨

vasy [-VpavsoipSHL] [-C num] [-E num] [-I format] [-P file] filename
[outname]

πŸ‘‘ DESCRIPTION πŸ‘‘

VASY is a hierarchical VHDL Analyzer for Synthesis. she does a whole semantic analysis of a VHDL RTL description called filename, and honestly? the VHDL subset she handles is way more extended than the Alliance one (peep vasy(5) for the deets, iykyk). and she identifies with precision all the memorizing elements and tristate buffers. precision. she's not guessing, she's knowing. πŸ’€

during her analysis she:

  • expands generic parameters
  • executes generic map and generate statements
  • unrolls static FOR loops

and at the end?? she drives an equivalent description called outname (in Verilog or VHDL format) that's accepted by most of synthesis tools. slay. πŸŽ€


🌈 ENVIRONMENT VARIABLES 🌈

  • MBK_WORK_LIB(1) β€” indicates the path to the read/write directory for the session. basically where she keeps her stuff. 🫢

πŸ’… OPTIONS πŸ’…

one bullet per flag, no skips, we don't gatekeep here:

  • -V β€” Verbose mode on. each step of the analysis gets displayed on the standard output. she's narrating her own life. main character energy fr fr. 🎀
  • -v β€” Drives an equivalent description in Verilog format.
  • -a β€” Drives an equivalent description in Alliance VHDL format vbe(5) and/or vst(5). and heads up bestie: with this option, all arithmetic operators are expanded in an equivalent set of boolean expressions, because those operators just don't belong to the Alliance VHDL subset. not invited to the party. πŸ™ˆ
  • -s β€” Drives an equivalent VHDL description (with the extention .vhd) accepted by most of industrial synthesis tools.
  • -S β€” Uses Std_logic instead of Bit (taken into account only with option -s). ⭐
  • -i β€” Drives initial signal values (taken into account only with option -s).
  • -I format β€” Specifies the VHDL input format, such as Alliance VHDL format vbe(5), vst(5) or industrial VHDL format vhd or vhdl.
  • -H β€” In a structural description, all model of instances are recursively analyzed. (By default VASY analyzes only models with generic parameters.) The leaves cells are defined by a file called CATAL (see catal(5) for details).
  • -o β€” Authorizes to overwrite existing files. she's bold like that. πŸ”₯
  • -p β€” Adds power supply connectors (vdd and vss). useful option to enter in Alliance.
  • -C num β€” When the size of the adder is greater or equal to num, a Carry Look Ahead adder is generated, instead of a Ripple Carry adder. (taken into account only with option -a).
  • -E num β€” Comparators are expanded in an equivalent set of boolean expressions, when their size is greater than num (taken into account only with option -a).
  • -L β€” A file .lax (see lax(5) for details) is generated. this file contains the list of all signals that must be kept during the synthesis step, using boom (see boom(1) for details). (taken into account only with option -a). keeping receipts. 🧾
  • -P file β€” Specifies a file.pkg containing a list of logical and physical package name:
# Example
work.constants.all  : pkg_constants
work.components.all : pkg_components

πŸ¦‹ SEE ALSO πŸ¦‹

vasy(5), vbe(5), vhdl(5), catal(5). lax(5). asimut(1), boom(1), MBK_WORK_LIB(1). MBK_CATA_LIB(1). MBK_CATAL_NAME(1).

go read them, they're all her friends. πŸ’œ


😭 BUG REPORT 😭

This tool is under development at the ASIM department of the LIP6 laboratory.

We need your feedback to improve documentation and tools. like genuinely, they're asking, pls tell them. πŸ™


ngl if something's broken, that's on purpose (under development) β€” but your feedback is what fixes it. 🫢

and that's the whole page, bestie!! ✨ written by the fine folks at ASIM/LIP6, dated November 26, 1999, for manual page VASY(1). she's been iconic since '99 and she's still serving. periodt. πŸ’–πŸŽ€πŸ¦‹