LOON(1)

📦 version 5.1.1-unstable-2025-02, in nixos 26.05, nixpkgs unstable

💅 LOON(1) — the CAO-VLSI Reference Manual, but make it cute

okay so bestie, this is loon from the CAO-VLSI Reference Manual and honestly? she's lowkey iconic. let's get into it 🦋

✨ NAME ✨

LooN — Local optimizations of Nets. yes bestie, Nets, capital N, that's her whole thing 💅

🌸 ORIGIN 🌸

so this software belongs to the ALLIANCE CAD SYSTEM, developed by the ASIM team at the LIP6 laboratory of Université Pierre et Marie CURIE, in Paris, France. France!! the vibes are immaculate 🇫🇷✨

🎀 SYNOPSIS 🎀

loon  [-hmxlo] input_file output_file  [lax_file]

💖 DESCRIPTION 💖

so loon is this CAD tool that lets you remove fanout problems within a gate netlist, and also optimize the delay. she does both. multitasking queen 👑

the netlist can be hierarchical and is flattened if necessary — like, she'll flatten it herself, don't worry about it.

loon runs in batch mode, and a parameter file can be used (see man lax) to parametrize the optimization by adding information on outputs (fanin), inputs (fanout, delay), and by setting general parameters such as the optimization level. so much control, we love to see it 🫶

loon also permits computing delays of gates in the netlist and gives the critical path in the netlist. and the global optimization of loon performs gate repowering to decrease the critical path delay and global capacitance. buffers are only inserted in critical path — only the critical path, she's not doing extra work for no reason 💀

🌈 lax Parameter file description 🌈

the lax file is common with other logic synthesis tools and is used for driving the synthesis process. see lax(5) manual for more detail, iykyk.

lax uses a lot of parameters to guide every step of the synthesis process. some parameters are globally used (for example, optimization level) whereas others are specifically used (load capacitance for the netlist optimization only — very specific of her 💅). here's the default lax file (see the user's manual for further information about the syntax of the .lax file):

Optimization mode = 2 (50% area - 50% delay)
Input impedance = 0
Output capacitance = 0
Delayed input = none
Auxiliary signal saved = none

🔥 OPTION 🔥

  • -h — Help mode. displays possible uses of loon. she's literally telling you how to use her, slay.
  • -o input_file — Overwrites the source file if no output_file is given. this can be useful if you don't want several netlist files — very minimal, very clean, no clutter ✨
  • -m optim_mode — Optimization mode. can be defined in the lax file, this is only a shortcut to define it on the command line. this mode number has an array defined between 0 and 4. it indicates the way of optimization the user wants. if 0 is chosen, the circuit area will be improved. on the other hand, 4 will improve circuit delays. 2 is a medium value for optimization — the balanced middle child, we respect her 🫶
  • -x xsch_mode — Generate a .xsc file. it's a color map for each signals contained in output_file network. this file is used by xsch to view the netlist. by choosing level 0 or 1 for xsch_mode, you can color respectively the critical path or all signals with delay graduation. aesthetic and functional?? she ate 🎨
  • -l lax_file — Just another way to show explicitly the LAX parameter file name. sometimes you just wanna be explicit, and that's valid 💅

🦋 ENVIRONMENT VARIABLES 🦋

the following environment variables have to be set before using loon — like, mandatory, no cap:

  • MBK_CATA_LIB gives the auxiliary paths of the directories of input files (behavioural description).
  • MBK_TARGET_LIB gives the path (single) of the directory of the selected standard cell library.
  • MBK_IN_LO gives the input format of the structural description.
  • MBK_OUT_LO gives the output format of the structural description.

⭐ EXAMPLE ⭐

you can call loon as follows :

loon alu alu_loon

look at her go 😭💖

🧚 SEE ALSO 🧚

loon(1), boog(1), boom(1), lax(5), vbe(5), proof(1), asimut(1), vhdl(5), ocp(1), nero(1), sxlib(5).

the whole friend group, fr fr 👑

💀 BUG REPORT 💀

this tool is under development at the ASIM department of the LIP6 laboratory.

we need your feedback to improve documentation and tools. like genuinely, tell them, they're asking nicely 🙈🫶

bestie if something's weird, say something — feedback is literally how this gets better.

and that's the tea 🍓 this little page came from ASIM/LIP6, dated Sept 01 2000, sitting pretty in section LOON(1) of the CAO-VLSI Reference Manual. mwah, go optimize some nets 💜✨

📦 where this page comes from