zl3073x_dpll_ptp_adjphase(9)

💅 zl3073x_dpll_ptp_adjphase(9)

okay bestie, welcome to the Kernel API Manual ✨ — this is the page for zl3073x_dpll_ptp_adjphase, and honestly it's a lil cutie. one function, one job: nudge the phase of your PTP clock. that's it. that's the whole vibe. 🎀

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🌸 NAME

zl3073x_dpll_ptp_adjphase — adjust PTP clock phase 🦋

like, literally just adjusting the PTP clock phase. no cap.

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⭐ SYNOPSIS

int zl3073x_dpll_ptp_adjphase (struct ptp_clock_info *info , s32 delta
);

she takes two things and returns an int, periodt.

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💖 ARGUMENTS

• info — the PTP clock info 🫶 your main character struct, fr.
• delta — the phase adjustment, measured in nanoseconds ⏱️ like, how much you wanna shift things.

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👑 DESCRIPTION

okay so here's the tea: this is only supported in AUTO and REFLOCK modes 💅 anywhere else and she's simply not doing it.

and the way she does it? she uses a TIE write to get you nanosecond-resolution phase adjustment ✨ like, precise. iconic. no notes.

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🔥 RETURN

the return values, bestie, let's go:

• 0 — success 💚 or delta is zero, which is a whole no-op, she literally did nothing and that's fine.
• -EOPNOTSUPP — the mode doesn't support TIE and delta is non-zero 😭 can't help you here.
• negative — some other error 💀 not great, not terrible, just negative.

ngl, if you're getting that -EOPNOTSUPP bestie, check your mode first. it's giving "wrong mode" energy. 🙈

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🧚 SEE ALSO

the whole friend group 🫶 go say hi:

Kernel file ./drivers/dpll/zl3073x/dpll.c struct zl3073x_dpll_pin(9), zl3073x_dpll_is_input_pin(9), zl3073x_dpll_is_nco_pin(9), zl3073x_dpll_is_p_pin(9), zl3073x_dpll_connected_ref_get(9), zl3073x_dpll_ref_operstate_get(9), zl3073x_dpll_pin_alloc(9), zl3073x_dpll_pin_free(9), zl3073x_dpll_pin_register(9), zl3073x_dpll_pin_unregister(9), zl3073x_dpll_pins_unregister(9), zl3073x_dpll_pin_is_registrable(9), zl3073x_dpll_pins_register(9), zl3073x_dpll_device_register(9), zl3073x_dpll_device_unregister(9), zl3073x_dpll_pin_phase_offset_check(9), zl3073x_dpll_pin_ffo_check(9), zl3073x_dpll_pin_measured_freq_check(9), zl3073x_dpll_changes_check(9), zl3073x_dpll_init_fine_phase_adjust(9), zl3073x_dpll_ptp_gettimex64(9), zl3073x_dpll_ptp_settime64(9), zl3073x_dpll_ptp_adjtime_phase_step(9), zl3073x_dpll_ptp_adjtime(9), zl3073x_dpll_ptp_adjfine(9), zl3073x_dpll_ptp_register(9), zl3073x_dpll_ptp_unregister(9), zl3073x_dpll_ref_sync_pair_register(9), zl3073x_dpll_ref_sync_pairs_register(9), zl3073x_dpll_alloc(9), zl3073x_dpll_free(9), zl3073x_dpll_register(9), zl3073x_dpll_unregister(9)

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and that's the page!! 🎀 this one lives over in ./drivers/dpll/zl3073x, dated October 2026 — shoutout to the source and the version, mwah 💜💅 slay, go adjust some phase, bestie. 🌈