zl3073x_dpll_ptp_adjtime(9)
π
zl3073x_dpll_ptp_adjtime (9) β Kernel API Manual β¨
okay so bestie, welcome to the glow-up era of the ZL3073X DPLL driver π¦ this little function lives in the Kernel API Manual, and honestly? she's doing a LOT of heavy lifting with PTP clock time adjustments. let's get into it π
πΈ NAME πΈ
zl3073x_dpll_ptp_adjtime β literally the function that adjusts PTP clock time, no cap β°β¨
π SYNOPSIS π
int zl3073x_dpll_ptp_adjtime (struct ptp_clock_info *info , s64 delta );
π¦ ARGUMENTS π¦
infoβ the PTP clock info, aka the main character struct we're working with πdeltaβ the time adjustment, measured in nanoseconds β±οΈ (yes we're in nano territory, she's precise)
π DESCRIPTION π
okay so this is where it gets iconic. for NCO, large deltas (>= 1 second β that's a big girl delta π) get split up: a ToD read-modify-write handles the seconds part, and an output phase step handles the sub-second remainder. π«Ά
sub-second deltas? those use phase step directly. but if phase step or the TIE write fails, she falls back to the ToD read-modify-write β resilient queen behavior, we love to see it β¨
in AUTO/REFLOCK modes, the vibe shifts a little: large deltas get split into a ToD read-modify-write for the seconds and a TIE write for the sub-second remainder. sub-second deltas just use the TIE write directly. simple, clean, slay π
π¨ okay important caveat bestie, don't skip this: if the seconds part was already committed when the sub-second mechanism fails, the function returns 0. why? to prevent the PTP servo from retrying the full delta and applying the seconds again π ff that would be a disaster. so she takes the L gracefully and reports success so nothing gets double-applied. periodt.
β RETURN β
0on success (or partial success β she's doing her best okay π )<0on error π
π SEE ALSO π
the whole squad, fr fr β Kernel file ./drivers/dpll/zl3073x/dpll.c, struct zl3073x_dpll_pin(9), and like, the entire friend group:
zl3073x_dpll_is_input_pin(9)zl3073x_dpll_is_nco_pin(9)zl3073x_dpll_is_p_pin(9)zl3073x_dpll_connected_ref_get(9)zl3073x_dpll_ref_operstate_get(9)zl3073x_dpll_pin_alloc(9)zl3073x_dpll_pin_free(9)zl3073x_dpll_pin_register(9)zl3073x_dpll_pin_unregister(9)zl3073x_dpll_pins_unregister(9)zl3073x_dpll_pin_is_registrable(9)zl3073x_dpll_pins_register(9)zl3073x_dpll_device_register(9)zl3073x_dpll_device_unregister(9)zl3073x_dpll_pin_phase_offset_check(9)zl3073x_dpll_pin_ffo_check(9)zl3073x_dpll_pin_measured_freq_check(9)zl3073x_dpll_changes_check(9)zl3073x_dpll_init_fine_phase_adjust(9)zl3073x_dpll_ptp_gettimex64(9)zl3073x_dpll_ptp_settime64(9)zl3073x_dpll_ptp_adjtime_phase_step(9)zl3073x_dpll_ptp_adjfine(9)zl3073x_dpll_ptp_adjphase(9)zl3073x_dpll_ptp_register(9)zl3073x_dpll_ptp_unregister(9)zl3073x_dpll_ref_sync_pair_register(9)zl3073x_dpll_ref_sync_pairs_register(9)zl3073x_dpll_alloc(9)zl3073x_dpll_free(9)zl3073x_dpll_register(9)zl3073x_dpll_unregister(9)
and that's the whole page bestie!! π this one's sourced from ./drivers/dpll/zl3073x and dated October 2026 β iykyk, she's a future icon πβ¨ go forth and adjust those clocks fr fr π¦π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms