xilinx_dma_prep_slave_sg(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– xilinx_dma_prep_slave_sg(9) πŸ’–

okay so bestie, this is xilinx_dma_prep_slave_sg from the Kernel API Manual, and it's literally the glow-up guide for prepping descriptors for a DMA_SLAVE transaction πŸ’…βœ¨

🌸 NAME 🌸

xilinx_dma_prep_slave_sg β€” prepare descriptors for a DMA_SLAVE transaction. that's the whole vibe: getting those descriptors ready before the transfer goes off 🫢

✨ SYNOPSIS ✨

here's the signature in all its main-character glory:

struct dma_async_tx_descriptor * xilinx_dma_prep_slave_sg (struct
dma_chan *dchan , struct scatterlist *sgl , unsigned int sg_len , enum
dma_transfer_direction direction , unsigned long flags , void *context
);

πŸŽ€ ARGUMENTS πŸŽ€

okay so every single parameter, no skipping, because we don't do that here:

  • dchan β€” the DMA channel you're working with. main character energy, fr.
  • sgl β€” the scatterlist you're transferring to/from. it's giving data itinerary πŸ¦‹
  • sg_len β€” number of entries in the scatterlist. count them, bestie πŸ”’
  • direction β€” the DMA direction. which way is the data going? iconic question.
  • flags β€” transfer ack flags. keep an eye on these πŸ‘€
  • context β€” the APP words of the descriptor. yes, that's what it says.

🌈 RETURN 🌈

on success you get an async transaction descriptor; on failure you get NULL. that's the whole return vibe. descriptor = yay, NULL = crying in the club 😭

πŸ¦‹ SEE ALSO πŸ¦‹

if you're going down the Xilinx DMA rabbit hole (and honestly, same), start with the kernel file ./drivers/dma/xilinx/xilinx_dma.c and then these absolutely iconic references:


okay that's the whole page, bestie πŸ’– source/version: ./drivers/dma/xilinx, date: October 2026. now go prep those descriptors and be iconic πŸ‘‘βœ¨

πŸ“¦ where this page comes from