xilinx_dma_prep_slave_sg(9)
π xilinx_dma_prep_slave_sg(9) π
okay so bestie, this is xilinx_dma_prep_slave_sg from the Kernel API Manual, and it's literally the glow-up guide for prepping descriptors for a DMA_SLAVE transaction π
β¨
πΈ NAME πΈ
xilinx_dma_prep_slave_sg β prepare descriptors for a DMA_SLAVE transaction. that's the whole vibe: getting those descriptors ready before the transfer goes off π«Ά
β¨ SYNOPSIS β¨
here's the signature in all its main-character glory:
struct dma_async_tx_descriptor * xilinx_dma_prep_slave_sg (struct
dma_chan *dchan , struct scatterlist *sgl , unsigned int sg_len , enum
dma_transfer_direction direction , unsigned long flags , void *context
);
π ARGUMENTS π
okay so every single parameter, no skipping, because we don't do that here:
dchanβ the DMA channel you're working with. main character energy, fr.sglβ the scatterlist you're transferring to/from. it's giving data itinerary π¦sg_lenβ number of entries in the scatterlist. count them, bestie π’directionβ the DMA direction. which way is the data going? iconic question.flagsβ transfer ack flags. keep an eye on these πcontextβ the APP words of the descriptor. yes, that's what it says.
π RETURN π
on success you get an async transaction descriptor; on failure you get NULL. that's the whole return vibe. descriptor = yay, NULL = crying in the club π
π¦ SEE ALSO π¦
if you're going down the Xilinx DMA rabbit hole (and honestly, same), start with the kernel file ./drivers/dma/xilinx/xilinx_dma.c and then these absolutely iconic references:
- the kernel file
./drivers/dma/xilinx/xilinx_dma.c struct xilinx_vdma_desc_hw(9)struct xilinx_axidma_desc_hw(9)struct xilinx_aximcdma_desc_hw(9)struct xilinx_cdma_desc_hw(9)struct xilinx_vdma_tx_segment(9)struct xilinx_axidma_tx_segment(9)struct xilinx_aximcdma_tx_segment(9)struct xilinx_cdma_tx_segment(9)struct xilinx_dma_tx_descriptor(9)struct xilinx_dma_chan(9)enum xdma_ip_type(9)struct xilinx_dma_device(9)vdma_desc_write_64(9)xilinx_dma_get_metadata_ptr(9)xilinx_vdma_alloc_tx_segment(9)xilinx_cdma_alloc_tx_segment(9)xilinx_axidma_alloc_tx_segment(9)xilinx_aximcdma_alloc_tx_segment(9)xilinx_dma_free_tx_segment(9)xilinx_mcdma_free_tx_segment(9)xilinx_cdma_free_tx_segment(9)xilinx_vdma_free_tx_segment(9)xilinx_dma_alloc_tx_descriptor(9)xilinx_dma_free_tx_descriptor(9)xilinx_dma_free_desc_list(9)xilinx_dma_free_descriptors(9)xilinx_dma_free_chan_resources(9)xilinx_dma_get_residue(9)xilinx_dma_chan_handle_cyclic(9)xilinx_dma_chan_desc_cleanup(9)xilinx_dma_do_tasklet(9)xilinx_dma_alloc_chan_resources(9)xilinx_dma_calc_copysize(9)xilinx_dma_tx_status(9)xilinx_dma_stop_transfer(9)xilinx_cdma_stop_transfer(9)xilinx_dma_start(9)xilinx_vdma_start_transfer(9)xilinx_cdma_start_transfer(9)xilinx_dma_start_transfer(9)xilinx_mcdma_start_transfer(9)xilinx_dma_issue_pending(9)xilinx_dma_device_config(9)xilinx_dma_complete_descriptor(9)xilinx_dma_reset(9)xilinx_dma_chan_reset(9)xilinx_mcdma_irq_handler(9)xilinx_dma_irq_handler(9)append_desc_queue(9)xilinx_dma_tx_submit(9)xilinx_vdma_dma_prep_interleaved(9)xilinx_cdma_prep_memcpy(9)xilinx_dma_prep_peripheral_dma_vec(9)xilinx_dma_prep_dma_cyclic(9)xilinx_mcdma_prep_slave_sg(9)xilinx_dma_terminate_all(9)xilinx_vdma_channel_set_config(9)xilinx_dma_chan_remove(9)xilinx_dma_chan_probe(9)xilinx_dma_child_probe(9)of_dma_xilinx_xlate(9)xilinx_dma_probe(9)xilinx_dma_remove(9)
okay that's the whole page, bestie π source/version: ./drivers/dma/xilinx, date: October 2026. now go prep those descriptors and be iconic πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms