xilinx_dma_prep_dma_cyclic(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸŽ€ NAME πŸŽ€

okay bestie, welcome to xilinx_dma_prep_dma_cyclic(9) from the Kernel API Manual πŸ’– β€” this one is literally here to prepare descriptors for a DMA_SLAVE transaction ✨

🌸 SYNOPSIS 🌸

struct dma_async_tx_descriptor * xilinx_dma_prep_dma_cyclic (struct
dma_chan *dchan , dma_addr_t buf_addr , size_t buf_len , size_t
period_len , enum dma_transfer_direction direction , unsigned long flags
);

πŸ’… ARGUMENTS πŸ’…

  • dchan β€” DMA channel πŸ‘‘
  • buf_addr β€” physical address of the buffer 🫢
  • buf_len β€” total length of the cyclic buffers 🌈
  • period_len β€” length of individual cyclic buffer πŸŽ€
  • direction β€” DMA direction πŸ¦‹
  • flags β€” transfer ack flags ⭐

🫢 RETURN 🫢

Async transaction descriptor on success, and NULL on failure 😭 β€” that's the whole vibe check, no cap πŸ’€

πŸ”₯ SEE ALSO πŸ”₯


and that's the page, bestie 🫢 source/version vibes live under ./drivers/dma/xilinx ✨, dated October 2026 πŸŽ€, and the whole thing is xilinx_dma_prep_dma_cyclic(9) β€” periodt πŸ’…

πŸ“¦ where this page comes from