vdma_desc_write_64(9)
π vdma_desc_write_64 β the Kernel API Manual, bestie edition π
okay so this is from the Kernel API Manual (yes, the (9) section, that's the kernel dev one, iykyk) and we're talking about vdma_desc_write_64(9). it's giving "tiny helper function that does one specific little thing and does it well." let's get into it π
β¨ NAME β¨
vdma_desc_write_64 β a 64-bit descriptor write. that's it. that's the whole vibe. π
π¦ SYNOPSIS π¦
void vdma_desc_write_64 (struct xilinx_dma_chan *chan , u32 reg , u32
value_lsb , u32 value_msb );
like, she's a void function, she takes four things, she doesn't return anything because she doesn't need to β¨ (no notes, we love a low-maintenance icon)
πΈ ARGUMENTS πΈ
chanβ the driver-specific VDMA channel π«Ά this is your channel, bestie, the one you're working with.regβ the register to write. lowkey just tell her where to go.value_lsbβ the lower address of the descriptor π₯value_msbβ the upper address of the descriptor π€
π DESCRIPTION π
okay so here's the situation, and it's kind of iconic honestly π
the vdma driver is trying to write to a register offset that is not a multiple of 64 bits β the manpage literally gives 0x5c as the example, and yeah, 0x5c is not it, she's just not 64-bit aligned, no cap π
so instead of doing a single 64-bit register write (which she simply cannot do at that offset), we write it as two separate 32-bit writes instead. that's the whole trick. split it up, send it in two,~~slay~~ done. it's giving "we made it work" energy and honestly? respect π₯
fr fr this is a workaround-style behaviour, so don't go thinking you're getting one clean 64-bit write out here β you're getting two 32-bit pieces. periodt. π
β SEE ALSO β
a LOT of friends in this group chat, so buckle up bestie, we're tagging everybody π
- Kernel file
./drivers/dma/xilinx/xilinx_dma.c struct xilinx_vdma_desc_hw(9)struct xilinx_axidma_desc_hw(9)struct xilinx_aximcdma_desc_hw(9)struct xilinx_cdma_desc_hw(9)struct xilinx_vdma_tx_segment(9)struct xilinx_axidma_tx_segment(9)struct xilinx_aximcdma_tx_segment(9)struct xilinx_cdma_tx_segment(9)struct xilinx_dma_tx_descriptor(9)struct xilinx_dma_chan(9)enum xdma_ip_type(9)struct xilinx_dma_device(9)xilinx_dma_get_metadata_ptr(9)xilinx_vdma_alloc_tx_segment(9)xilinx_cdma_alloc_tx_segment(9)xilinx_axidma_alloc_tx_segment(9)xilinx_aximcdma_alloc_tx_segment(9)xilinx_dma_free_tx_segment(9)xilinx_mcdma_free_tx_segment(9)xilinx_cdma_free_tx_segment(9)xilinx_vdma_free_tx_segment(9)xilinx_dma_alloc_tx_descriptor(9)xilinx_dma_free_tx_descriptor(9)xilinx_dma_free_desc_list(9)xilinx_dma_free_descriptors(9)xilinx_dma_free_chan_resources(9)xilinx_dma_get_residue(9)xilinx_dma_chan_handle_cyclic(9)xilinx_dma_chan_desc_cleanup(9)xilinx_dma_do_tasklet(9)xilinx_dma_alloc_chan_resources(9)xilinx_dma_calc_copysize(9)xilinx_dma_tx_status(9)xilinx_dma_stop_transfer(9)xilinx_cdma_stop_transfer(9)xilinx_dma_start(9)xilinx_vdma_start_transfer(9)xilinx_cdma_start_transfer(9)xilinx_dma_start_transfer(9)xilinx_mcdma_start_transfer(9)xilinx_dma_issue_pending(9)xilinx_dma_device_config(9)xilinx_dma_complete_descriptor(9)xilinx_dma_reset(9)xilinx_dma_chan_reset(9)xilinx_mcdma_irq_handler(9)xilinx_dma_irq_handler(9)append_desc_queue(9)xilinx_dma_tx_submit(9)xilinx_vdma_dma_prep_interleaved(9)xilinx_cdma_prep_memcpy(9)xilinx_dma_prep_peripheral_dma_vec(9)xilinx_dma_prep_slave_sg(9)xilinx_dma_prep_dma_cyclic(9)xilinx_mcdma_prep_slave_sg(9)xilinx_dma_terminate_all(9)xilinx_vdma_channel_set_config(9)xilinx_dma_chan_remove(9)xilinx_dma_chan_probe(9)xilinx_dma_child_probe(9)of_dma_xilinx_xlate(9)xilinx_dma_probe(9)xilinx_dma_remove(9)
like I said. everybody. π
π§ sign-off π§
this little cutie lives in ./drivers/dma/xilinx π and the page is dated October 2026 ποΈ β so yeah, she's from the future, main character energy only πβ¨ bye bestie, go write some descriptors ππ¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms