xe_tlb_inval...emask_submit(9)

okay bestie, welcome to the Kernel API Manual page for xe_tlb_inval...emask_submit(9) — yes, that’s our full-name baddie xe_tlb_inval_range_tilemask_submit(9) — and we’re about to make TLB invalidation make sense 💅✨

🎀 NAME 🎀

xe_tlb_inval_range_tilemask_submit — submit TLB invalidations for an address range on a tile mask. That’s the whole assignment, bestie.

✨ SYNOPSIS ✨

the signature, exactly as it is, no edits:

int xe_tlb_inval_range_tilemask_submit (struct xe_device *xe , u32 asid
, u64 start , u64 end , u8 tile_mask , struct xe_tlb_inval_batch *batch
);

🧚 ARGUMENTS 🧚

• xe — the xe device.
• asid — Address space ID.
• start — start address.
• end — end address.
• tile_mask — mask for which gt's issue tlb invalidation.
• batch — Batch of tlb invalidate fences.

🦋 DESCRIPTION 🦋

The way that this function works: it issues a range based TLB invalidation for gt's in tilemask. ngl, this is the lowkey important bit: if the function returns an error, there is no need to call xe_tlb_inval_batch_wait on batch.

It returns 0 for success, negative error code otherwise. Periodt.

🌈 SEE ALSO 🌈

the whole squad, no cap:

• Kernel file ./drivers/gpu/drm/xe/xe_tlb_inval.c
• Xe TLB invalidation(9)
• tlb_inval_fini(9)
• xe_gt_tlb_inval_init_early(9)
• xe_tlb_inval_reset(9)
• xe_tlb_inval_reset_timeout(9)
• xe_tlb_inval_all(9)
• xe_tlb_inval_ggtt(9)
• xe_tlb_inval_range(9)
• xe_tlb_inval_vm(9)
• xe_tlb_inval_done_handler(9)
• xe_tlb_inval_fence_init(9)
• xe_tlb_inval_idle(9)
• xe_tlb_inval_batch_wait(9)

mwah 💋 that’s the page! source/version: ./drivers/gpu/drm/xe; date: October 2026 — bye bestie, go invalidate those TLBs 🫶✨