ppc440spe_adma_tx_status(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… ppc440spe_adma_tx_status(9) β€” like, the Kernel API Manual page, bestie ✨

okay so real talk, this is a page from the Kernel API Manual and it's about polling how an ADMA transaction is doing. yes, polling. like refreshing your feed but for hardware DMA descriptors. iykyk πŸ¦‹


🌸 NAME 🌸

ppc440spe_adma_tx_status β€” poll the status of an ADMA transaction. that's it, that's the vibe check πŸ‘‘


✨ SYNOPSIS ✨

enum dma_status ppc440spe_adma_tx_status (struct dma_chan *chan ,
dma_cookie_t cookie , struct dma_tx_state *txstate );

look at her. iconic signature. no cap πŸ’…


πŸŽ€ ARGUMENTS πŸŽ€

  • chan β€” the ADMA channel handle 🫢 this is your main character, the channel you're asking about
  • cookie β€” the ADMA transaction identifier πŸ“ like a little receipt number for the transaction, so the channel knows which one you mean
  • txstate β€” a holder for the current state of the channel πŸ’– you pass this in and it gets to hold the state, that's literally its job
ngl these three are the whole thing. short page, but she ate πŸ”₯

πŸ¦‹ SEE ALSO πŸ¦‹

  • Kernel file ./drivers/dma/ppc4xx/adma.c β€” go read the source, it's giving lore πŸ“œ

and okay, the whole squad, in order, no skipping (i promised every single one):

ppc440spe_desc_init_interrupt(9), ppc440spe_desc_init_null_xor(9), ppc440spe_desc_init_xor(9), ppc440spe_desc_init_dma2pq(9), ppc440spe_desc_init_dma01pq(9), ppc440spe_desc_init_dma01pqzero_sum(9), ppc440spe_desc_init_memcpy(9), ppc440spe_desc_set_src_addr(9), ppc440spe_desc_set_src_mult(9), ppc440spe_desc_set_dest_addr(9), ppc440spe_desc_set_byte_count(9), ppc440spe_desc_set_rxor_block_size(9), ppc440spe_desc_set_dcheck(9), ppc440spe_xor_set_link(9), ppc440spe_desc_set_link(9), ppc440spe_desc_get_link(9), ppc440spe_desc_is_aligned(9), ppc440spe_chan_xor_slot_count(9), ppc440spe_dma2_pq_slot_count(9), ppc440spe_adma_device_clear_eot_status(9), ppc440spe_chan_is_busy(9), ppc440spe_chan_set_first_xor_descriptor(9), ppc440spe_dma_put_desc(9), ppc440spe_chan_append(9), ppc440spe_chan_get_current_descriptor(9), ppc440spe_chan_run(9), ppc440spe_can_rxor(9), ppc440spe_get_group_entry(9), ppc440spe_adma_free_slots(9), ppc440spe_adma_run_tx_complete_actions(9), ppc440spe_adma_clean_slot(9), __ppc440spe_adma_slot_cleanup(9), ppc440spe_adma_tasklet(9), ppc440spe_adma_slot_cleanup(9), ppc440spe_adma_alloc_slots(9), ppc440spe_adma_alloc_chan_resources(9), ppc440spe_rxor_set_src(9), ppc440spe_rxor_set_mult(9), ppc440spe_adma_check_threshold(9), ppc440spe_adma_tx_submit(9), ppc440spe_adma_prep_dma_interrupt(9), ppc440spe_adma_prep_dma_memcpy(9), ppc440spe_adma_prep_dma_xor(9), ppc440spe_adma_init_dma2rxor_slot(9), ppc440spe_dma01_prep_mult(9), ppc440spe_dma01_prep_sum_product(9), ppc440spe_adma_prep_dma_pq(9), ppc440spe_adma_prep_dma_pqzero_sum(9), ppc440spe_adma_prep_dma_xor_zero_sum(9), ppc440spe_adma_set_dest(9), ppc440spe_adma_pq_set_dest(9), ppc440spe_desc_set_xor_src_cnt(9), ppc440spe_adma_pq_set_src(9), ppc440spe_adma_memcpy_xor_set_src(9), ppc440spe_adma_dma2rxor_inc_addr(9), ppc440spe_adma_dma2rxor_prep_src(9), ppc440spe_adma_dma2rxor_set_src(9), ppc440spe_adma_dma2rxor_set_mult(9), ppc440spe_init_rxor_cursor(9), ppc440spe_adma_pq_set_src_mult(9), ppc440spe_adma_free_chan_resources(9), ppc440spe_adma_eot_handler(9), ppc440spe_adma_err_handler(9), ppc440spe_test_callback(9), ppc440spe_adma_issue_pending(9), ppc440spe_chan_start_null_xor(9), ppc440spe_test_raid6(9), ppc440spe_adma_probe(9), ppc440spe_adma_remove(9)

the way that's a whole friend group 😭🫢 but fr fr if you're touching ppc440spe_adma_tx_status, these are your people. say hi. 🌈


kisses bestie, go poll that status πŸ’œ

this gem came from ./drivers/dma/ppc4xx, dated October 2026 β€” mwah, slay, periodt πŸŽ€βœ¨

πŸ“¦ where this page comes from