ppc440spe_ad...p_dma_memcpy(9)
π NAME π
ppc440spe_adma_prep_dma_memcpy β bestie, this one's entire personality is preparing a CDB for a MEMCPY operation. That's it, that's the job. It's a Kernel API Manual girly (yes, we're in the Kernel API Manual, welcome π), and it does exactly one little thing: get that command descriptor block ready so the memcpy can happen. Slay.
β¨ SYNOPSIS β¨
struct dma_async_tx_descriptor * ppc440spe_adma_prep_dma_memcpy (struct
dma_chan *chan , dma_addr_t dma_dest , dma_addr_t dma_src , size_t len ,
unsigned long flags );
Like, look at her. Five whole parameters. Iconic signature, no notes. π
π«Ά ARGUMENTS π«Ά
Okay so here's the tea, and I need you to sit down for this one: the documentation for every single argument is literally -- undescribed --. Not me hyping up five mystery men. π So here they are, in order, with the exact amount of lore the page gives us (which is zero):
chanβ-- undescribed --π«₯dma_destβ-- undescribed --π«₯dma_srcβ-- undescribed --π«₯lenβ-- undescribed --π«₯flagsβ-- undescribed --π«₯
That's the whole vibe check. The struct dma_chan * is a channel, the dma_addr_ts are addresses, size_t len is a length and unsigned long flags is flags β that's just the types talking, fr fr, the manual itself is giving silent main character energy. π We respect the mystery.
π SEE ALSO π
The Kernel file is ./drivers/dma/ppc4xx/adma.c β that's where all the lore lives, bestie. And then there's the family. The whole entire family. This function has, like, so many siblings and I'm listing every single one because nobody gets left behind at this party π:
ppc440spe_desc_init_interrupt(9)ppc440spe_desc_init_null_xor(9)ppc440spe_desc_init_xor(9)ppc440spe_desc_init_dma2pq(9)ppc440spe_desc_init_dma01pq(9)ppc440spe_desc_init_dma01pqzero_sum(9)ppc440spe_desc_init_memcpy(9)ppc440spe_desc_set_src_addr(9)ppc440spe_desc_set_src_mult(9)ppc440spe_desc_set_dest_addr(9)ppc440spe_desc_set_byte_count(9)ppc440spe_desc_set_rxor_block_size(9)ppc440spe_desc_set_dcheck(9)ppc440spe_xor_set_link(9)ppc440spe_desc_set_link(9)ppc440spe_desc_get_link(9)ppc440spe_desc_is_aligned(9)ppc440spe_chan_xor_slot_count(9)ppc440spe_dma2_pq_slot_count(9)ppc440spe_adma_device_clear_eot_status(9)ppc440spe_chan_is_busy(9)ppc440spe_chan_set_first_xor_descriptor(9)ppc440spe_dma_put_desc(9)ppc440spe_chan_append(9)ppc440spe_chan_get_current_descriptor(9)ppc440spe_chan_run(9)ppc440spe_can_rxor(9)ppc440spe_get_group_entry(9)ppc440spe_adma_free_slots(9)ppc440spe_adma_run_tx_complete_actions(9)ppc440spe_adma_clean_slot(9)__ppc440spe_adma_slot_cleanup(9)ppc440spe_adma_tasklet(9)ppc440spe_adma_slot_cleanup(9)ppc440spe_adma_alloc_slots(9)ppc440spe_adma_alloc_chan_resources(9)ppc440spe_rxor_set_src(9)ppc440spe_rxor_set_mult(9)ppc440spe_adma_check_threshold(9)ppc440spe_adma_tx_submit(9)ppc440spe_adma_prep_dma_interrupt(9)ppc440spe_adma_prep_dma_xor(9)ppc440spe_adma_init_dma2rxor_slot(9)ppc440spe_dma01_prep_mult(9)ppc440spe_dma01_prep_sum_product(9)ppc440spe_adma_prep_dma_pq(9)ppc440spe_adma_prep_dma_pqzero_sum(9)ppc440spe_adma_prep_dma_xor_zero_sum(9)ppc440spe_adma_set_dest(9)ppc440spe_adma_pq_set_dest(9)ppc440spe_desc_set_xor_src_cnt(9)ppc440spe_adma_pq_set_src(9)ppc440spe_adma_memcpy_xor_set_src(9)ppc440spe_adma_dma2rxor_inc_addr(9)ppc440spe_adma_dma2rxor_prep_src(9)ppc440spe_adma_dma2rxor_set_src(9)ppc440spe_adma_dma2rxor_set_mult(9)ppc440spe_init_rxor_cursor(9)ppc440spe_adma_pq_set_src_mult(9)ppc440spe_adma_free_chan_resources(9)ppc440spe_adma_tx_status(9)ppc440spe_adma_eot_handler(9)ppc440spe_adma_err_handler(9)ppc440spe_test_callback(9)ppc440spe_adma_issue_pending(9)ppc440spe_chan_start_null_xor(9)ppc440spe_test_raid6(9)ppc440spe_adma_probe(9)ppc440spe_adma_remove(9)
And that's the page, bestie. It came to us from ./drivers/dma/ppc4xx, dated October 2026, and honestly? A whole era. Go prep that CDB. You got this. ππ¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms