intel_gvt_m..._write_patch(9)
π intel_gvt_mmio_is_cmd_write_patch(9)
okay so bestie, welcome to the Kernel API Manual β¨ we're looking at intel_gvt_mmio_is_cmd_write_patch β yes the whole name, no we're not shortening it, it's iconic and it earned every character π
πΈ NAME πΈ
intel_gvt_mmio_is_cmd_write_patch β the little function that checks whether an mmio's cmd access needs to be patched π literally its whole job, and honestly? it ate.
β¨ SYNOPSIS β¨
bool intel_gvt_mmio_is_cmd_write_patch (struct intel_gvt *gvt , unsigned int offset );
it takes two things and gives you back a bool β the vibes are immaculate, the signature is right there β¬οΈ no cap.
π¦ ARGUMENTS π¦
gvtβ a GVT device π this is the main character of the whole operation.offsetβ register offset π the address-y little number you're asking about.
π RETURN π
Returns True if GPU command write to an MMIO should be patched. that's it, that's the answer, periodt π
bestie the True is capitalized in the source, so we're keeping it capitalized. we don't do lowercase erasure here π
π₯ SEE ALSO π₯
- Kernel file
./drivers/gpu/drm/i915/gvt/gvt.hβ go read it, it's giving source of truth π intel_gvt_mmio_set_accessed(9)π«Άintel_gvt_mmio_is_cmd_accessible(9)β¨intel_gvt_mmio_set_cmd_accessible(9)πintel_gvt_mmio_is_unalign(9)π¦intel_gvt_mmio_has_mode_mask(9)πintel_gvt_mmio_is_sr_in_ctx(9)βintel_gvt_mmio_set_sr_in_ctx(9)πΈintel_gvt_mmio_set_cmd_write_patch(9)π₯ the setter to this getter, they're a matched set, we love a duo πintel_gvt_read_gpa(9)πintel_gvt_write_gpa(9)π§
like, the whole mmio friend group is in the SEE ALSO and honestly they're all so valid π
that's the page, bestie β¨ go forth and patch your cmd writes responsibly π this was ./drivers/gpu/drm/i915/gvt, October 2026, and the whole intel_gvt_m..._write_patch(9) situation β catch you in the next manpage, mwah π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms