intel_gvt_mm...as_mode_mask(9)

💅 intel_gvt_mmio_has_mode_mask(9) — Kernel API Manual

okay so bestie, welcome to the Kernel API Manual ✨ and today's main character is intel_gvt_mmio_has_mode_mask 🎀 (the page header lowkey truncates it as intel_gvt_mm...as_mode_mask(9) but we know her full name, iykyk 💖).

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🌸 NAME

intel_gvt_mmio_has_mode_mask — literally answers "does this MMIO have a mode mask?" 🦋

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✨ SYNOPSIS

bool intel_gvt_mmio_has_mode_mask (struct intel_gvt *gvt , unsigned int
       offset );

it's giving "simple little boolean function with two arguments" and honestly? iconic 👑

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🫶 ARGUMENTS

• gvt — a GVT device 💻 (the whole device vibe, no big deal)
• offset — register offset 📍

that's it, that's the whole guest list 🎀

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🔥 RETURN

True if a MMIO has a mode mask in its higher 16 bits, and false if it isn't 💀 no in-between, no maybe, no "it's complicated" — just a good ol' bool 🌈

heads up: the mode mask lives specifically in the higher 16 bits, so don't go looking for it in the low half, bestie 🙈

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🌟 SEE ALSO

Kernel file ./drivers/gpu/drm/i915/gvt/gvt.h 📁

and the whole friend group 💜:

• intel_gvt_mmio_set_accessed(9)
• intel_gvt_mmio_is_cmd_accessible(9)
• intel_gvt_mmio_set_cmd_accessible(9)
• intel_gvt_mmio_is_unalign(9)
• intel_gvt_mmio_is_sr_in_ctx(9)
• intel_gvt_mmio_set_sr_in_ctx(9)
• intel_gvt_mmio_set_cmd_write_patch(9)
• intel_gvt_mmio_is_cmd_write_patch(9)
• intel_gvt_read_gpa(9)
• intel_gvt_write_gpa(9)

like, the whole intel_gvt_mmio_* squad ate and left no crumbs 🔥👑

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ngl, that was a short one, but she served exactly what she needed to serve 💅 periodt.

and that's the tea 🍓 — brought to you from ./drivers/gpu/drm/i915/gvt, dated October 2026, page intel_gvt_mm...as_mode_mask(9) — mwah, go check your mode masks bestie 😭💖🧚