cail_reg_write(9)
π» cail_reg_write(9) β Kernel API Manual π»
πΈ NAME πΈ
cail_reg_write β write MMIO register π
β¨ SYNOPSIS β¨
void cail_reg_write (struct card_info *info , uint32_t reg , uint32_t
val );
π«Ά ARGUMENTS π«Ά
infoβ atomcard_infopointer β yes bestie, that exact atom card info pointer π«Άregβ MMIO register offset β¨valβ value to write to the pll register π
π DESCRIPTION π
Okay so this icon provides a MMIO register accessor for the atom interpreter (r4xx+) π That's the whole assignment: MMIO register access, atom-interpreter edition, and it ate β¨
π SEE ALSO π
Kernel file: ./drivers/gpu/drm/radeon/radeon_device.c β yes, that one, right there π«Ά
radeon_program_register_sequence(9)radeon_surface_init(9)radeon_scratch_init(9)radeon_scratch_get(9)radeon_scratch_free(9)radeon_doorbell_init(9)radeon_doorbell_fini(9)radeon_doorbell_get(9)radeon_doorbell_free(9)radeon_wb_disable(9)radeon_wb_fini(9)radeon_wb_init(9)radeon_vram_location(9)radeon_gtt_location(9)radeon_card_posted(9)radeon_update_bandwidth_info(9)radeon_boot_test_post_card(9)radeon_dummy_page_init(9)radeon_dummy_page_fini(9)cail_pll_read(9)cail_pll_write(9)cail_mc_read(9)cail_mc_write(9)cail_reg_read(9)cail_ioreg_write(9)cail_ioreg_read(9)radeon_atombios_init(9)radeon_atombios_fini(9)radeon_combios_init(9)radeon_combios_fini(9)radeon_vga_set_decode(9)radeon_gart_size_auto(9)radeon_check_arguments(9)radeon_switcheroo_set_state(9)radeon_switcheroo_can_switch(9)radeon_device_init(9)radeon_device_fini(9)radeon_gpu_reset(9)
okay that's the whole page, bestie π Source/version lives at ./drivers/gpu/drm/radeon, the date on this cutie is October 2026, and the footer title is cail_reg_write(9) β periodt π
β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms