cail_mc_write(9)
π cail_mc_write β a whole kernel API manual moment
okay bestie, welcome to cail_mc_write(9), straight out of the Kernel API Manual. it's a kernel function, it writes an MC register, and it's honestly giving "small but mighty". let's get into it π
β¨ NAME β¨
cail_mc_write β write an MC (Memory Controller) register. that's it, that's the whole job. iconic behaviour, no notes π
πΈ SYNOPSIS πΈ
void cail_mc_write (struct card_info *info , uint32_t reg , uint32_t val
);
yes the spacing is a little chaotic, but she's valid C and we love her anyway π«Ά
π¦ ARGUMENTS π¦
infoβ an atomcard_infopointer. your whole card's little info era πregβ the MC register offset. this is where we're writing, bestie πvalβ the value to write to the pll register. (and yes, the page literally says "pll register" right there in thevalline even though we're doing MC stuff β i'm just reporting what it says, don't come for me ππ)
π DESCRIPTION π
okay so here's the vibe: this function provides an MC register accessor for the atom interpreter, and that's for r4xx+. so like, Radeon 400-series and up, she's in her lane, doing her little register write π
β¨
that's genuinely the whole description. short, sweet, ate and left no crumbs π₯
π§ SEE ALSO π§
buckle up bestie, this list is long and we're keeping every single one of them, because every friend in this friend group matters π
first, the kernel file:
- Kernel file
./drivers/gpu/drm/radeon/radeon_device.c
and now the whole crew, in order:
radeon_program_register_sequence(9)radeon_surface_init(9)radeon_scratch_init(9)radeon_scratch_get(9)radeon_scratch_free(9)radeon_doorbell_init(9)radeon_doorbell_fini(9)radeon_doorbell_get(9)radeon_doorbell_free(9)radeon_wb_disable(9)radeon_wb_fini(9)radeon_wb_init(9)radeon_vram_location(9)radeon_gtt_location(9)radeon_card_posted(9)radeon_update_bandwidth_info(9)radeon_boot_test_post_card(9)radeon_dummy_page_init(9)radeon_dummy_page_fini(9)cail_pll_read(9)cail_pll_write(9)cail_mc_read(9)cail_reg_write(9)cail_reg_read(9)cail_ioreg_write(9)cail_ioreg_read(9)radeon_atombios_init(9)radeon_atombios_fini(9)radeon_combios_init(9)radeon_combios_fini(9)radeon_vga_set_decode(9)radeon_gart_size_auto(9)radeon_check_arguments(9)radeon_switcheroo_set_state(9)radeon_switcheroo_can_switch(9)radeon_device_init(9)radeon_device_fini(9)radeon_gpu_reset(9)
like i said. the whole crew. no cap π«‘
remember bestie: this is a kernel-side page ((9) is the section, iykyk), so these references are kernel API cross-refs, not the friendly user commands you type in your shell πΈ
and that's the page!! it lives under ./drivers/gpu/drm/radeon, it's stamped October 2026, and the page itself is cail_mc_write(9), so go forth and write those MC registers responsibly, mwah ππβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms