cail_pll_write(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… cail_pll_write(9) β€” like, the PLL register writer, bestie

okay so real quick: this whole thing lives in the Kernel API Manual, and yes it's a (9) page, we love a section 9 moment ✨


🌸 NAME

cail_pll_write β€” write PLL register. that's it, that's the vibe. it writes. to a PLL register. iconic behavior honestly πŸŽ€


✨ SYNOPSIS

void cail_pll_write (struct card_info *info , uint32_t reg , uint32_t val );

returns void btw, so like… don't go looking for a return value, she gives you nothing back and that's fine πŸ’…


🫢 ARGUMENTS

  • info β€” an atom card_info pointer. yes bestie, pointer, keep track of it πŸ™ˆ
  • reg β€” the PLL register offset. this is the where πŸ—ΊοΈ
  • val β€” the value you're writing to the pll register. this is the what ✍️

πŸ”₯ DESCRIPTION

okay so here's the tea: this gives you a PLL register accessor for the atom interpreter, and it's for r4xx+ β€” so if you're on r4xx or newer, she's there for you πŸ¦‹

like, that's literally the whole job. accessor. for the PLL register. for the atom interpreter. no cap 🧚


πŸ‘‘ SEE ALSO

the kernel file first, because she's the main character:

  • Kernel file ./drivers/gpu/drm/radeon/radeon_device.c

and then the whole friend group, in order, no one left out πŸ’–

lowkey the read/write pairs are so satisfying to look at together, cail_pll_read and cail_pll_write sitting right there πŸ₯Ή


anyway that's the page!! source/version is ./drivers/gpu/drm/radeon, dated October 2026, and the page is cail_pll_write(9) β€” mwah, go write some PLL registers responsibly bestie πŸ’œπŸŽ€

πŸ“¦ where this page comes from