__wrpll_calc_filter_range(9)

💅 __wrpll_calc_filter_range — like, the NAME section but make it cute

okay so this page lives in the Kernel API Manual (section 9, for the uninitiated ✨) and it's literally all about one thing: determine PLL loop filter bandwidth. That's it. That's the whole vibe. 🎀

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✨ SYNOPSIS ✨

int __wrpll_calc_filter_range (unsigned long post_divr_freq );

bestie. it's one function. it takes one argument. it returns an int. we love a low-maintenance icon. 👑

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🌸 ARGUMENTS 🌸

• post_divr_freq — the input clock rate after the R divider. yes. after. please don't hand it the before-divider number, i'm begging 🙈

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🦋 DESCRIPTION 🦋

so here's the tea ☕ — this function picks the value you're gonna present to the PLL RANGE input signals, and it makes that call based on the input clock frequency after the post-R-divider, which is post_divr_freq.

and like, does it just make something up? no ma'am. 💅 this code follows the recommendations in the PLL datasheet for filter range selection. the datasheet said what it said. we're respecting the datasheet.

no cap, that's the whole description. sometimes a function just does its job and doesn't need a whole saga. 🌈

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🔥 RETURN 🔥

two possible endings, bestie:

• the RANGE value to be presented to the PLL configuration inputs — the good ending 🫶
• or a negative return code upon error — the 😭 ending. check for it. fr fr.

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💜 SEE ALSO 💜

• Kernel file ./drivers/clk/analogbits/wrpll-cln28hpc.c
• __wrpll_calc_fbdiv(9)
• __wrpll_calc_divq(9)
• __wrpll_update_parent_rate(9)
• wrpll_configure_for_rate(9)
• wrpll_calc_output_rate(9)
• wrpll_calc_max_lock_us(9)

like, the whole friend group honestly. go read all of them. iykyk. 🧚

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ngl this one's short and sweet, but that doesn't mean you get to skip the error check. negative return code = actual thing that can happen. 💀

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and that's the page!! 🌸 brought to you by ./drivers/clk/analogbits, dated October 2026, starring __wrpll_calc_filter_range(9) in the main character role. slay, periodt, go configure your PLL responsibly 💖✨🎀