__wrpll_calc_divq(9)

💅 __wrpll_calc_divq — the kernel API manual, but make it make sense

okay so bestie, welcome to the __wrpll_calc_divq(9) page — yes that's the whole function name, it's giving "my parents let the keyboard mash pick my name" but honestly? iconic. this is a Kernel API Manual entry and it's about figuring out one (1) number for a PLL. that's it. that's the vibe. 🎀

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✨ NAME ✨

__wrpll_calc_divq — literally just: determine DIVQ based on target PLL output clock rate 💫

like, the function's entire personality is "what should DIVQ be?" and honestly same.

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🌸 SYNOPSIS 🌸

u8 __wrpll_calc_divq (u32 target_rate , u64 *vco_rate );

look at her. she takes two things and she gives you back a u8. no cap. 🦋

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🫶 ARGUMENTS 🫶

• target_rate — the target PLL output clock rate. this is the rate you want, the dream, the goal, the main character energy of the whole call 💖
• vco_rate — a pointer to a u64 where the computed VCO rate gets stored. it's an out-param bestie, she writes into it 🌟

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💅 DESCRIPTION 💅

so here's what's happening: this function determines a reasonable value for the PLL Q post-divider, based on the target output rate target_rate for the PLL. that's the Q post-divider. yes. we love her. 🔥

and it doesn't just do one thing — she's multi-talented (main character energy fr fr):

1. it returns the computed Q divider value as the return value
2. it also stores the desired target VCO rate into the variable pointed to by vco_rate

two jobs, one function, ate and left no crumbs 👑

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⭐ CONTEXT ⭐

any context. literally any. she's flexible like that 💫

okay but the important part: the caller must protect the memory pointed to by vco_rate from simultaneous access or modification. like, no sharing without permission bestie, that's undefined-behavior territory and we don't do that here 🙈

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🌈 RETURN 🌈

• success → a positive integer DIVQ value, to be programmed into the hardware. slay, go program it 💖
• error → 0

and yes, 0 is the error signal specifically because 0 is an invalid DIVQ value. so if you see a zero coming back, that's not a divider, that's a "nope." 💀

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🦋 SEE ALSO 🦋

• Kernel file ./drivers/clk/analogbits/wrpll-cln28hpc.c — the whole friend group lives here 🏠
• __wrpll_calc_filter_range(9)
• __wrpll_calc_fbdiv(9)
• __wrpll_update_parent_rate(9)
• wrpll_configure_for_rate(9)
• wrpll_calc_output_rate(9)
• wrpll_calc_max_lock_us(9)

go read them all, iykyk 🌸

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💜 and that's the page!! brought to you by ./drivers/clk/analogbits, dated October 2026, filed under __wrpll_calc_divq(9) — stan the clock framework, mwah 🧚✨