vcn_v5_0_0_s...gating_state(9)
πΈ NAME πΈ
okay bestie, welcome to this Kernel API Manual moment for vcn_v5_0_0_s...gating_state(9) β the page itself is all about:
vcn_v5_0_0_set_clockgating_state β set VCN block clockgating state β¨
π¦ SYNOPSIS π¦
int vcn_v5_0_0_set_clockgating_state (struct amdgpu_ip_block *ip_block ,
enum amd_clockgating_state state );
π ARGUMENTS π
ip_blockβ amdgpu_ip_block pointer. literally that pointer, no cap πstateβ clock gating state. the state of the clock gating situation, bestie π«Ά
π DESCRIPTION π
Set VCN block clockgating state. that's the whole vibe β it sets the VCN block clockgating state, iconic and to the point β¨
π SEE ALSO π
the kernel file is literally right here, go peek:
./drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
and these besties are all linked in the same SEE ALSO energy:
vcn_v5_0_0_early_init(9)vcn_v5_0_0_sw_init(9)vcn_v5_0_0_sw_fini(9)vcn_v5_0_0_hw_init(9)vcn_v5_0_0_hw_fini(9)vcn_v5_0_0_suspend(9)vcn_v5_0_0_resume(9)vcn_v5_0_0_mc_resume(9)vcn_v5_0_0_mc_resume_dpg_mode(9)vcn_v5_0_0_disable_static_power_gating(9)vcn_v5_0_0_enable_static_power_gating(9)vcn_v5_0_0_disable_clock_gating(9)vcn_v5_0_0_disable_clock_gating_dpg_mode(9)vcn_v5_0_0_enable_clock_gating(9)vcn_v5_0_0_start_dpg_mode(9)vcn_v5_0_0_set_mmhub_eco_sec_level(9)vcn_v5_0_0_start(9)vcn_v5_0_0_stop_dpg_mode(9)vcn_v5_0_0_stop(9)vcn_v5_0_0_pause_dpg_mode(9)vcn_v5_0_0_unified_ring_get_rptr(9)vcn_v5_0_0_unified_ring_get_wptr(9)vcn_v5_0_0_unified_ring_set_wptr(9)vcn_v5_0_0_set_unified_ring_funcs(9)vcn_v5_0_0_is_idle(9)vcn_v5_0_0_wait_for_idle(9)vcn_v5_0_0_process_interrupt(9)vcn_v5_0_0_set_irq_funcs(9)
mwah π
this cutie came from ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and it's the manual page for vcn_v5_0_0_s...gating_state(9) β periodt β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms