vcn_v5_0_0_mc_resume(9)

💅 NAME 💅

vcn_v5_0_0_mc_resume — literally the memory controller programming moment, bestie ✨

🎀 SYNOPSIS 🎀

void vcn_v5_0_0_mc_resume (struct amdgpu_vcn_inst *vinst );

🦋 ARGUMENTS 🦋

• vinst — the VCN instance, aka the main character of this whole function 🫶

✨ DESCRIPTION ✨

Okay so picture this: it's time to let the VCN memory controller know it's offsets. That's it. That's the whole job. Lowkey iconic of it to be this straightforward, ngl 🌸

🔥 SEE ALSO 🔥

Kernel file ./drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c — go read the source, iykyk 👑

And the whole friend group, fr fr:

• vcn_v5_0_0_early_init(9)
• vcn_v5_0_0_sw_init(9)
• vcn_v5_0_0_sw_fini(9)
• vcn_v5_0_0_hw_init(9)
• vcn_v5_0_0_hw_fini(9)
• vcn_v5_0_0_suspend(9)
• vcn_v5_0_0_resume(9)
• vcn_v5_0_0_mc_resume_dpg_mode(9)
• vcn_v5_0_0_disable_static_power_gating(9)
• vcn_v5_0_0_enable_static_power_gating(9)
• vcn_v5_0_0_disable_clock_gating(9)
• vcn_v5_0_0_disable_clock_gating_dpg_mode(9)
• vcn_v5_0_0_enable_clock_gating(9)
• vcn_v5_0_0_start_dpg_mode(9)
• vcn_v5_0_0_set_mmhub_eco_sec_level(9)
• vcn_v5_0_0_start(9)
• vcn_v5_0_0_stop_dpg_mode(9)
• vcn_v5_0_0_stop(9)
• vcn_v5_0_0_pause_dpg_mode(9)
• vcn_v5_0_0_unified_ring_get_rptr(9)
• vcn_v5_0_0_unified_ring_get_wptr(9)
• vcn_v5_0_0_unified_ring_set_wptr(9)
• vcn_v5_0_0_set_unified_ring_funcs(9)
• vcn_v5_0_0_is_idle(9)
• vcn_v5_0_0_wait_for_idle(9)
• vcn_v5_0_0_set_clockgating_state(9)
• vcn_v5_0_0_process_interrupt(9)
• vcn_v5_0_0_set_irq_funcs(9)

That's a wrap, bestie! 💖 This lil page comes to you from the kernel source tree at ./drivers/gpu/drm/amd/amdgpu, section 9 of the Kernel API Manual, dated October 2026. Slay, go program that memory controller 🌈🫶