t4_tp_indirect_rw(9)
π t4_tp_indirect_rw(9) β like, the Kernel API Manual, but make it make sense
okay so bestie, welcome to t4_tp_indirect_rw, straight out of the Kernel API Manual. this one's a function, it's in section 9, and it's about poking TP indirect registers β either the chill way (LDST) or the sneaky way (backdoor) πͺβ¨. sit down, hydrate, let's go.
β¨ NAME β¨
t4_tp_indirect_rw β reads/writes a TP indirect register, and it'll go through LDST or through the backdoor to do it π«Ά
π SYNOPSIS π
void t4_tp_indirect_rw (struct adapter *adap , u32 reg_addr , u32 reg_data , u32 *buff , u32 nregs , u32 start_index , int rw , bool sleep_ok );
that's the whole signature, character for character, no cap. eight arguments, all main character energy π
πΈ ARGUMENTS πΈ
adapβ the adapter. the whole device vibes live here πreg_addrβ the Address Registerreg_dataβ the Data registerbuffβ where the indirect register values are stored / written. like the group chat, but for registers π¬nregsβ how many indirect registers we're reading/writing. count 'emstart_indexβ index of the first indirect register to read/write. the starting point, the origin story β¨rwβREAD(1)orWRITE(0). literally the direction of travel, pick one π§sleep_okβ iftruewe may sleep while awaiting command completion π΄ iffalse, no napping allowed, we stay awake for this one
π¦ DESCRIPTION π¦
so basically: read/write TP indirect registers through LDST if possible. and if that's not possible? plan B, bestie β fall back to backdoor access πͺπ₯
that's the whole bit. it's giving "try the front door first, then the secret tunnel."
π SEE ALSO π
first up, the actual source, iconic behavior:
- Kernel file
./drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
and now the entire friend group, fr fr, nobody gets left out:
t4_wait_op_done_val(9),t4_set_reg_field(9),t4_read_indirect(9),t4_write_indirect(9),t4_record_mbox(9)t4_wr_mbox_meat_timeout(9),t4_memory_rw_init(9),t4_memory_update_win(9),t4_memory_rw_residual(9),t4_memory_rw(9)t4_get_regs_len(9),t4_get_regs(9),t4_eeprom_ptov(9),t4_seeprom_wp(9),t4_get_raw_vpd_params(9)t4_get_vpd_params(9),t4_get_pfres(9),sf1_read(9),sf1_write(9),flash_wait_op(9)t4_read_flash(9),t4_write_flash(9),t4_get_fw_version(9),t4_get_bs_version(9),t4_get_tp_version(9)t4_get_exprom_version(9),t4_get_vpd_version(9),t4_get_scfg_version(9),t4_get_version_info(9),t4_dump_version_info(9)t4_check_fw_version(9),t4_flash_erase_sectors(9),t4_flash_cfg_addr(9),t4_load_fw(9),t4_phy_fw_ver(9)t4_load_phy_fw(9),t4_fwcache(9),fwcaps16_to_caps32(9),fwcaps32_to_caps16(9),t4_link_acaps(9)t4_link_l1cfg_core(9),t4_restart_aneg(9),t4_handle_intr_status(9),t4_slow_intr_handler(9),t4_intr_enable(9)t4_intr_disable(9),t4_config_rss_range(9),t4_config_glbl_rss(9),t4_config_vi_rss(9),t4_read_rss(9)t4_tp_fw_ldst_rw(9),t4_tp_pio_read(9),t4_tp_pio_write(9),t4_tp_tm_pio_read(9),t4_tp_mib_read(9)t4_read_rss_key(9),t4_write_rss_key(9),t4_read_rss_pf_config(9),t4_read_rss_vf_config(9),t4_read_rss_pf_map(9)t4_read_rss_pf_mask(9),t4_tp_get_tcp_stats(9),t4_tp_get_err_stats(9),t4_tp_get_cpl_stats(9),t4_tp_get_rdma_stats(9)t4_get_fcoe_stats(9),t4_get_usm_stats(9),t4_read_mtu_tbl(9),t4_read_cong_tbl(9),t4_tp_wr_bits_indirect(9)init_cong_ctrl(9),t4_load_mtus(9),t4_get_chan_txrate(9),t4_set_trace_filter(9),t4_get_trace_filter(9)t4_pmtx_get_stats(9),t4_pmrx_get_stats(9),compute_mps_bg_map(9),t4_get_mps_bg_map(9),t4_get_tp_e2c_map(9)t4_get_tp_ch_map(9),t4_get_port_type_description(9),t4_get_port_stats_offset(9),t4_get_port_stats(9),t4_get_lb_stats(9)t4_mdio_rd(9),t4_mdio_wr(9),t4_sge_decode_idma_state(9),t4_sge_ctxt_flush(9),t4_read_sge_dbqtimers(9)t4_fw_hello(9),t4_fw_bye(9),t4_early_init(9),t4_fw_reset(9),t4_fw_halt(9)t4_fw_restart(9),t4_fw_upgrade(9),t4_fl_pkt_align(9),t4_fixup_host_params(9),t4_fw_initialize(9)t4_query_params_rw(9),t4_set_params_timeout(9),t4_set_params(9),t4_cfg_pfvf(9),t4_alloc_vi(9)t4_free_vi(9),t4_set_rxmode(9),t4_free_encap_mac_filt(9),t4_free_raw_mac_filt(9),t4_alloc_encap_mac_filt(9)t4_alloc_raw_mac_filt(9),t4_alloc_mac_filt(9),t4_free_mac_filt(9),t4_change_mac(9),t4_set_addr_hash(9)t4_enable_vi_params(9),t4_enable_vi(9),t4_enable_pi_params(9),t4_identify_port(9),t4_iq_stop(9)t4_iq_free(9),t4_eth_eq_free(9),t4_ctrl_eq_free(9),t4_ofld_eq_free(9),t4_link_down_rc_str(9)fwcap_to_fwspeed(9),lstatus_to_fwcap(9),t4_handle_get_port_info(9),t4_update_port_info(9),t4_get_link_params(9)t4_handle_fw_rpl(9),init_link_config(9),t4_prep_adapter(9),t4_shutdown_adapter(9),t4_bar2_sge_qregs(9)t4_init_devlog_params(9),t4_init_sge_params(9),t4_init_tp_params(9),t4_filter_field_shift(9),t4_init_portinfo(9)t4_read_cimq_cfg(9),t4_read_cim_ibq(9),t4_read_cim_obq(9),t4_cim_read(9),t4_cim_write(9)t4_cim_read_la(9),t4_tp_read_la(9),t4_idma_monitor_init(9),t4_idma_monitor(9),t4_load_cfg(9)t4_set_vf_mac_acl(9),t4_read_pace_tbl(9),t4_get_tx_sched(9),t4_sge_ctxt_rd_bd(9),t4_i2c_rd(9)t4_set_vlan_acl(9),modify_device_id(9),t4_load_boot(9),t4_flash_bootcfg_addr(9)
π real talk:sleep_ok=truemeans we may sleep while waiting on command completion. that's the whole caveat, don't overthink it, just pass the right bool π
and that's the page, bestie π source/version lives at ./drivers/net/ethernet/chelsio... and the date stamp is October 2026 β mwah, go read some registers πβ¨π¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms