t4_seeprom_wp(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

t4_seeprom_wp β€” enable/disable EEPROM write protection πŸ’…

(okay so this is from the Kernel API Manual, section 9, and yes bestie we are reading kernel API docs together, this is our era now 🫢)


🌸 SYNOPSIS 🌸

int t4_seeprom_wp(struct adapter *adapter, bool enable);

πŸŽ€ ARGUMENTS πŸŽ€

  • adapter β€” the adapter. the whole entire NIC situation. the main character πŸ’–
  • enable β€” a bool, and it's literally just "do we turn write protection on, or do we turn it off?" no cap, that's the whole vibe check πŸ”₯

πŸ¦‹ DESCRIPTION πŸ¦‹

Enables or disables write protection on the serial EEPROM. that's it. that's the function. she flips the write-protect bit and goes home ✨

like β€” when enable says yes, the serial EEPROM is write-protected. when enable says no, it's not. one job, done flawlessly, we stan a focused queen πŸ‘‘


🌈 SEE ALSO 🌈

the friend group is large, okay, she knows everyone in ./drivers/net/ethernet/chelsio/cxgb4/t4_hw.c β€” here's the whole crew, name for name, no one left out, periodt πŸ’œ

t4_wait_op_done_val(9), t4_set_reg_field(9), t4_read_indirect(9),
t4_write_indirect(9), t4_record_mbox(9), t4_wr_mbox_meat_timeout(9),
t4_memory_rw_init(9), t4_memory_update_win(9), t4_memory_rw_residual(9),
t4_memory_rw(9), t4_get_regs_len(9), t4_get_regs(9), t4_eeprom_ptov(9),
t4_get_raw_vpd_params(9), t4_get_vpd_params(9), t4_get_pfres(9),
sf1_read(9), sf1_write(9), flash_wait_op(9), t4_read_flash(9),
t4_write_flash(9), t4_get_fw_version(9), t4_get_bs_version(9),
t4_get_tp_version(9), t4_get_exprom_version(9), t4_get_vpd_version(9),
t4_get_scfg_version(9), t4_get_version_info(9), t4_dump_version_info(9),
t4_check_fw_version(9), t4_flash_erase_sectors(9), t4_flash_cfg_addr(9),
t4_load_fw(9), t4_phy_fw_ver(9), t4_load_phy_fw(9), t4_fwcache(9),
fwcaps16_to_caps32(9), fwcaps32_to_caps16(9), t4_link_acaps(9),
t4_link_l1cfg_core(9), t4_restart_aneg(9), t4_handle_intr_status(9),
t4_slow_intr_handler(9), t4_intr_enable(9), t4_intr_disable(9),
t4_config_rss_range(9), t4_config_glbl_rss(9), t4_config_vi_rss(9),
t4_read_rss(9), t4_tp_fw_ldst_rw(9), t4_tp_indirect_rw(9),
t4_tp_pio_read(9), t4_tp_pio_write(9), t4_tp_tm_pio_read(9),
t4_tp_mib_read(9), t4_read_rss_key(9), t4_write_rss_key(9),
t4_read_rss_pf_config(9), t4_read_rss_vf_config(9),
t4_read_rss_pf_map(9), t4_read_rss_pf_mask(9), t4_tp_get_tcp_stats(9),
t4_tp_get_err_stats(9), t4_tp_get_cpl_stats(9), t4_tp_get_rdma_stats(9),
t4_get_fcoe_stats(9), t4_get_usm_stats(9), t4_read_mtu_tbl(9),
t4_read_cong_tbl(9), t4_tp_wr_bits_indirect(9), init_cong_ctrl(9),
t4_load_mtus(9), t4_get_chan_txrate(9), t4_set_trace_filter(9),
t4_get_trace_filter(9), t4_pmtx_get_stats(9), t4_pmrx_get_stats(9),
compute_mps_bg_map(9), t4_get_mps_bg_map(9), t4_get_tp_e2c_map(9),
t4_get_tp_ch_map(9), t4_get_port_type_description(9),
t4_get_port_stats_offset(9), t4_get_port_stats(9), t4_get_lb_stats(9),
t4_mdio_rd(9), t4_mdio_wr(9), t4_sge_decode_idma_state(9),
t4_sge_ctxt_flush(9), t4_read_sge_dbqtimers(9), t4_fw_hello(9),
t4_fw_bye(9), t4_early_init(9), t4_fw_reset(9), t4_fw_halt(9),
t4_fw_restart(9), t4_fw_upgrade(9), t4_fl_pkt_align(9),
t4_fixup_host_params(9), t4_fw_initialize(9), t4_query_params_rw(9),
t4_set_params_timeout(9), t4_set_params(9), t4_cfg_pfvf(9),
t4_alloc_vi(9), t4_free_vi(9), t4_set_rxmode(9),
t4_free_encap_mac_filt(9), t4_free_raw_mac_filt(9),
t4_alloc_encap_mac_filt(9), t4_alloc_raw_mac_filt(9),
t4_alloc_mac_filt(9), t4_free_mac_filt(9), t4_change_mac(9),
t4_set_addr_hash(9), t4_enable_vi_params(9), t4_enable_vi(9),
t4_enable_pi_params(9), t4_identify_port(9), t4_iq_stop(9),
t4_iq_free(9), t4_eth_eq_free(9), t4_ctrl_eq_free(9),
t4_ofld_eq_free(9), t4_link_down_rc_str(9), fwcap_to_fwspeed(9),
lstatus_to_fwcap(9), t4_handle_get_port_info(9), t4_update_port_info(9),
t4_get_link_params(9), t4_handle_fw_rpl(9), init_link_config(9),
t4_prep_adapter(9), t4_shutdown_adapter(9), t4_bar2_sge_qregs(9),
t4_init_devlog_params(9), t4_init_sge_params(9), t4_init_tp_params(9),
t4_filter_field_shift(9), t4_init_portinfo(9), t4_read_cimq_cfg(9),
t4_read_cim_ibq(9), t4_read_cim_obq(9), t4_cim_read(9), t4_cim_write(9),
t4_cim_read_la(9), t4_tp_read_la(9), t4_idma_monitor_init(9),
t4_idma_monitor(9), t4_load_cfg(9), t4_set_vf_mac_acl(9),
t4_read_pace_tbl(9), t4_get_tx_sched(9), t4_sge_ctxt_rd_bd(9),
t4_i2c_rd(9), t4_set_vlan_acl(9), modify_device_id(9), t4_load_boot(9),
t4_flash_bootcfg_addr(9)

and the source file to go read if you want the real lore:

./drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

fr fr read the actual file if you're gonna touch this β€” the manpage is the vibe, the source is the receipts 🧚

okay that's the whole page bestie, ily, go protect some EEPROM πŸ’– this one came out of ./drivers/net/ethernet/chelsio... back in October 2026 β€” iconic date, iconic doc, catch you in the next manpage πŸŽ€βœ¨πŸ‘‘

πŸ“¦ where this page comes from