STRUCT ZYNQMP_DP_MODE(9)

✨ struct zynqmp_dp_mode(9) ✨

okay so bestie, welcome to the struct zynqmp_dp_mode page from the Kernel API Manual 💖 this is the literal main-character struct for the configured mode of DisplayPort, and we're gonna get into it 🫶

🌸 NAME 🌸

struct zynqmp_dp_mode — Configured mode of DisplayPort 💅

🎀 SYNOPSIS 🎀

struct zynqmp_dp_mode {
    const char *fmt;
    int pclock;
    u8 bw_code;
    u8 lane_cnt;
};

like, that's the whole struct, she's small but she's iconic ✨

🦋 Members 🦋

• fmt — the format identifier string, aka the little name-tag that says what format we're on 🏷️
• pclock — pixel clock frequency of current mode, the literal heartbeat of the vibe ⏰
• bw_code — code for bandwidth(link rate), iykyk 🔥
• lane_cnt — number of lanes, and yes the count actually matters, no cap 💀

🌈 SEE ALSO 🌈

Kernel file ./drivers/gpu/drm/xlnx/zynqmp_dp.c, plus the whole friend group 👑

• struct zynqmp_dp_link_config(9)
• struct zynqmp_dp_config(9)
• enum test_pattern(9)
• struct zynqmp_dp_test(9)
• struct zynqmp_dp_train_set_priv(9)
• struct zynqmp_dp(9)
• zynqmp_dp_phy_init(9)
• zynqmp_dp_phy_exit(9)
• zynqmp_dp_phy_probe(9)
• zynqmp_dp_phy_ready(9)
• zynqmp_dp_max_rate(9)
• zynqmp_dp_mode_configure(9)
• zynqmp_dp_adjust_train(9)
• zynqmp_dp_update_vs_emph(9)
• zynqmp_dp_link_train_cr(9)
• zynqmp_dp_link_train_ce(9)
• zynqmp_dp_setup(9)
• zynqmp_dp_train(9)
• zynqmp_dp_train_loop(9)
• zynqmp_dp_aux_cmd_submit(9)
• zynqmp_dp_aux_init(9)
• zynqmp_dp_aux_cleanup(9)
• zynqmp_dp_update_misc(9)
• zynqmp_dp_set_format(9)
• zynqmp_dp_encoder_mode_set_transfer_unit(9)
• zynqmp_dp_encoder_mode_set_stream(9)
• zynqmp_dp_disp_connected_live_layer(9)
• zynqmp_dp_set_test_pattern(9)
• zynqmp_dp_enable_vblank(9)
• zynqmp_dp_disable_vblank(9)

and that's the whole page, bestie 🧚 from ./drivers/gpu/drm/xlnx 💜, October 2026 vintage, struct zynqmp_dp_mode(9) era — go read the source, mwah 💋💅