STRUCT ZYNQMP_DP(9)

💅 struct zynqmp_dp(9) 💅

okay bestie, welcome to the Kernel API Manual entry for struct zynqmp_dp — the Xilinx DisplayPort core. it’s giving “one struct holding all the DP lore,” and we are going through every single member. no skips. no cap. ✨

🎀 NAME 🎀

struct zynqmp_dp — Xilinx DisplayPort core 💖

✨ SYNOPSIS ✨

the struct definition is literally right here, bestie:

       struct zynqmp_dp {
           struct drm_dp_aux aux;
           struct drm_bridge bridge;
           struct work_struct hpd_work;
           struct work_struct hpd_irq_work;
           struct completion aux_done;
           struct mutex lock;
           struct device *dev;
           struct zynqmp_dpsub *dpsub;
           void __iomem *iomem;
           struct reset_control *reset;
           struct phy *phy[ZYNQMP_DP_MAX_LANES];
           enum drm_connector_status status;
           int irq;
           bool enabled;
           bool ignore_aux_errors;
           bool ignore_hpd;
           struct zynqmp_dp_train_set_priv
       debugfs_train_set[ZYNQMP_DP_MAX_LANES];
           struct zynqmp_dp_mode mode;
           struct zynqmp_dp_link_config link_config;
           struct zynqmp_dp_test test;
           struct zynqmp_dp_config config;
           u8 dpcd[DP_RECEIVER_CAP_SIZE];
           u8 train_set[ZYNQMP_DP_MAX_LANES];
           u8 num_lanes;
        };

🌸 Members 🌸

here’s the member-by-member vibe check, every field accounted for 🫶

• aux — aux channel.
• bridge — DRM bridge for the DP encoder.
• hpd_work — hot plug detection worker.
• hpd_irq_work — hot plug detection IRQ worker.
• aux_done — Completed when we get an AUX reply or timeout.
• lock — Mutex protecting this struct and register access (but not AUX).
• dev — device structure.
• dpsub — Display subsystem.
• iomem — device I/O memory for register access.
• reset — reset controller.
• phy — PHY handles for DP lanes.
• status — connection status.
• irq — irq.
• enabled — flag to indicate if the device is enabled.
• ignore_aux_errors — If set, AUX errors are suppressed.
• ignore_hpd — If set, HPD events and IRQs are ignored.
• debugfs_train_set — Debugfs private data for train_set.
• mode — current mode between IP core and sink device.
• link_config — common link configuration between IP core and sink device.
• test — Configuration for test mode.
• config — IP core configuration from DTS.
• dpcd — DP configuration data from currently connected sink device.
• train_set — set of training data.
• num_lanes — number of enabled phy lanes.

💖 Description 💖

okay so the tea on lock: it covers the link configuration in this struct and the device’s registers. it does not cover aux or ignore_aux_errors. and it is not strictly required for any of the members which are only modified at probe/remove time (e.g. dev). that’s the whole note, bestie — important, but keep it cute 💅

🌈 SEE ALSO 🌈

Kernel file ./drivers/gpu/drm/xlnx/zynqmp_dp.c, plus the whole friend group of references: struct zynqmp_dp_link_config(9), struct zynqmp_dp_mode(9), struct zynqmp_dp_config(9), enum test_pattern(9), struct zynqmp_dp_test(9), struct zynqmp_dp_train_set_priv(9), zynqmp_dp_phy_init(9), zynqmp_dp_phy_exit(9), zynqmp_dp_phy_probe(9), zynqmp_dp_phy_ready(9), zynqmp_dp_max_rate(9), zynqmp_dp_mode_configure(9), zynqmp_dp_adjust_train(9), zynqmp_dp_update_vs_emph(9), zynqmp_dp_link_train_cr(9), zynqmp_dp_link_train_ce(9), zynqmp_dp_setup(9), zynqmp_dp_train(9), zynqmp_dp_train_loop(9), zynqmp_dp_aux_cmd_submit(9), zynqmp_dp_aux_init(9), zynqmp_dp_aux_cleanup(9), zynqmp_dp_update_misc(9), zynqmp_dp_set_format(9), zynqmp_dp_encoder_mode_set_transfer_unit(9), zynqmp_dp_encoder_mode_set_stream(9), zynqmp_dp_disp_connected_live_layer(9), zynqmp_dp_set_test_pattern(9), zynqmp_dp_enable_vblank(9), zynqmp_dp_disable_vblank(9).

that’s the whole page, bestie 🫶 source/version energy: ./drivers/gpu/drm/xlnx; date: October 2026. slay, and happy DisplayPort-ing ✨💖