STRUCT SG2042_PLL_CLOCK(9)

🌸 NAME 🌸

okay bestie, this is the kernel API manual page for struct sg2042_pll_clock(9), and it is literally a PLL clock struct. no cap, that's the whole vibe — it's the struct for a PLL clock. periodt. 💅

✨ SYNOPSIS ✨

here's the exact struct shape, bestie — do not freestyle it:

       struct sg2042_pll_clock {
           struct clk_hw hw;
           unsigned int id;
           void __iomem *base;
           spinlock_t *lock;
           u32 offset_ctrl;
           u8 shift_status_lock;
           u8 shift_status_updating;
           u8 shift_enable;
        };

🧚 Members 🧚

• hw — clk_hw for initialization. slay, that's the init hookup ✨
• id — used to map clk_onecell_data. iykyk 🎀
• base — used for readl/writel. NOTE: PLL registers are all in SYS_CTRL! like, all of them, bestie 💀
• lock — spinlock to protect register access; modification of frequency can only be served one at the time. one at the time, no queue-jumping 🫶
• offset_ctrl — offset of pll control registers.
• shift_status_lock — shift of XXX_LOCK in pll status register.
• shift_status_updating — shift of UPDATING_XXX in pll status register.
• shift_enable — shift of XXX_CLK_EN in pll enable register.

🦋 SEE ALSO 🦋

• Kernel file ./drivers/clk/sophgo/clk-sg2042-pll.c
• sg2042_pll_recalc_rate(9)
• sg2042_pll_get_postdiv_1_2(9)
• sg2042_get_pll_ctl_setting(9)
• sg2042_clk_pll_recalc_rate(9)

mwah 💋 that's the page, bestie! source/version: ./drivers/clk/sophgo, date: October 2026, manual: struct sg2042_pll_clock(9). go slay those PLL clocks 🫶✨