sifive_prci_...se_hfpclkpll(9)

💅 sifive_prci_hfpclkpllsel_use_hfpclkpll(9) — a Kernel API Manual moment

okay so bestie, welcome to the Kernel API Manual ✨ — yes, the header up top is literally sifive_prci_...se_hfpclkpll(9) because even manpage titles gotta abbreviate when the function name is a whole paragraph, iykyk 😭. this one's all about flipping one (1) mux and dipping. short, sweet, iconic. 🎀

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✨ NAME ✨

sifive_prci_hfpclkpllsel_use_hfpclkpll — switch the HFPCLKPLL mux so it outputs HFPCLKPLL 🦋

so like, the whole personality of this function is "point the mux at the PLL, then leave." no drama, no extra steps, periodt.

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🌸 SYNOPSIS 🌸

void sifive_prci_hfpclkpllsel_use_hfpclkpll (struct __prci_data *pd );

it returns void, so there's literally nothing to check. no return value, no error code, no crumbs. 💀

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🎀 ARGUMENTS 🎀

• pd — a struct __prci_data * for the PRCI that's holding the HFPCLKPLL mux reg. that's your one and only param, bestie. hand it over and it knows which reg to poke. 🫶

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💖 DESCRIPTION 💖

Switch the HFPCLKPLL mux to the HFPCLKPLL output clock — and then it returns once it's complete. literally that's the whole arc. no cap. it does the switch, it's done, it goes home. 🔥

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👑 CONTEXT 👑

Any context. 🎉 yes, any. but listen — the caller must prevent concurrent changes to the PRCI_HFPCLKPLLSEL_OFFSET register. that part is on you, bestie. this function is not your bodyguard, it will not lock anything for you, so don't let two threads tag-team that register at the same time. 🙈

ngl the "any context" is generous but the concurrency bit is the real vibe check — no locking in here, so keep your register access serialized or it's giving chaos. 💅

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🔥 SEE ALSO 🔥

• Kernel file ./drivers/clk/sifive/sifive-prci.c
• __prci_readl(9)
• __prci_wrpll_unpack(9)
• __prci_wrpll_pack(9)
• __prci_wrpll_read_cfg0(9)
• __prci_wrpll_write_cfg0(9)
• __prci_wrpll_write_cfg1(9)
• sifive_prci_coreclksel_use_hfclk(9)
• sifive_prci_coreclksel_use_corepll(9)
• sifive_prci_coreclksel_use_final_corepll(9)
• sifive_prci_corepllsel_use_dvfscorepll(9)
• sifive_prci_corepllsel_use_corepll(9)
• sifive_prci_hfpclkpllsel_use_hfclk(9)
• __prci_register_clocks(9)
• sifive_prci_probe(9)

the whole little clk family is in there — go read them if you want the full lore. 📚✨

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and that's the page, babes 🧚 — brought to you by ./drivers/clk/sifive, dated October 2026, and signed at the bottom as sifive_prci_...se_hfpclkpll(9) so you can find it again. mwah 💋💜