pci_ext_cfg_is_aliased(9)

💖 pci_ext_cfg_is_aliased(9) — the Kernel API Manual page, bestie edition 🎀

okay so real quick, this is pci_ext_cfg_is_aliased from the Kernel API Manual (section 9, kernel-land only, no user commands here babes) — and it is lowkey one of those tiny helper functions that exists purely because some hardware vendors woke up and chose chaos. let's get into it ✨

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🌸 NAME 🌸

pci_ext_cfg_is_aliased — is ext config space literally just an alias of std config space?? like, is it the same thing wearing a different outfit? 👀

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✨ SYNOPSIS ✨

bool pci_ext_cfg_is_aliased (struct pci_dev *dev );

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🫶 ARGUMENTS 🫶

• dev — the PCI device in question. that's it. that's the whole parameter. give it a device, it gives you a bool 🦋

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💅 DESCRIPTION 💅

okay so picture this: the PCI Express to PCI/PCI-X Bridge Specification, rev 1.0, 4.1.4 says — and I'm paraphrasing but also not, this is literally what it says — that when a bridge is forwarding a type1 configuration request, it must check that the extended register address field is zero. that's the rule. non-negotiable. and if it's not zero, the bridge is not permitted to forward the transaction at all, and it has to handle it as an Unsupported Request. periodt. 📜

but bestie… some bridges simply did not get the memo 🙈 they do NOT follow this rule — they just casually drop the extended register bits. and what happens when you drop bits? the standard config space ends up being aliased, repeating every 256 bytes across the entire configuration space. like a wallpaper pattern. iconic behavior, terrible spec compliance. 😭

so how do we catch these offenders? the function tests for this exact condition by comparing the first dword of each potential alias against the vendor/device ID. if it matches where it shouldn't — boom, aliased, we got 'em. 🔥

Known offenders (the hall of shame, in the source's own words):

• ASM1083/1085 PCIe-to-PCI Reversible Bridge (1b21:1080, rev 01 & 03)
• AMD/ATI SBx00 PCI to PCI Bridge (1002:4384, rev 40)

these two are on the list, and honestly? they earned it. 💀

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👑 SEE ALSO 👑

Kernel file ./drivers/pci/probe.c, plus a whole squad of related functions:

• __pci_size_bars(9)
• __pci_read_base(9)
• pcie_get_link_speed(9)
• pci_ea_fixed_busnrs(9)
• pci_cfg_space_size_ext(9)
• pci_intx_mask_broken(9)
• pci_setup_device(9)
• pcie_relaxed_ordering_enabled(9)
• pci_release_dev(9)
• pci_scan_slot(9)
• pci_scan_child_bus_extend(9)
• pci_scan_child_bus(9)
• pcibios_root_bridge_prepare(9)
• pci_rescan_bus_bridge_resize(9)
• pci_rescan_bus(9)

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💜 one thing to remember: this function is a detector, not a fixer. it tells you the bridge is being sus — what you do with that information is between you and your PCI core. no cap.

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and that's the whole page, bestie! this one lives in ./drivers/pci, dated October 2026 in this printing, and it ate. go forth and check your bridges 🌈⭐