irq_gc_mask_disable_reg(9)

💅 NAME 💅

Okay so this is irq_gc_mask_disable_reg(9), straight outta the Kernel API Manual, and it's literally this: irq_gc_mask_disable_reg — Mask chip via disable register. That's the whole name, bestie, no cap. 💖

🦋 SYNOPSIS 🦋

void irq_gc_mask_disable_reg (struct irq_data *d );

🎀 ARGUMENTS 🎀

• d — irq_data. That's it. One argument, iconic behavior. ✨

🌸 DESCRIPTION 🌸

Okay so picture this: the chip has separate enable/disable registers instead of a single mask register. That's the situation this function is made for, and it masks the chip via the disable register. Periodt. 💅

🌈 SEE ALSO 🌈

Kernel file: ./kernel/irq/generic-chip.c — plus the whole friend group of related pages, all still in their (9) era:

• irq_gc_noop(9)
• irq_gc_mask_set_bit(9)
• irq_gc_mask_clr_bit(9)
• irq_gc_unmask_enable_reg(9)
• irq_gc_ack_set_bit(9)
• irq_gc_ack_clr_bit(9)
• irq_gc_mask_disable_and_ack_set(9)
• irq_gc_eoi(9)
• irq_gc_set_wake(9)
• irq_alloc_generic_chip(9)
• irq_domain_alloc_generic_chips(9)
• irq_domain_remove_generic_chips(9)
• __irq_alloc_domain_generic_chips(9)
• irq_get_domain_generic_chip(9)
• irq_setup_generic_chip(9)
• irq_setup_alt_chip(9)
• irq_remove_generic_chip(9)

Signing off from the source/version spot, ./kernel/irq, dated October 2026 — this was the irq_gc_mask_disable_reg(9) page. Stay iconic, bestie 💖✨