irq_gc_mask_clr_bit(9)

💖 irq_gc_mask_clr_bit(9) 💖

okay so bestie, you've landed in the Kernel API Manual ✨ and this is the page for irq_gc_mask_clr_bit — no cap, it's giving kernel-internals realness. Let's go 💅

✨ NAME ✨

irq_gc_mask_clr_bit — mask chip via clearing bit in mask register

🌸 SYNOPSIS 🌸

void irq_gc_mask_clr_bit (struct irq_data *d );

🎀 ARGUMENTS 🎀

• d — irq_data. That's the whole argument, bestie 🫶

🦋 DESCRIPTION 🦋

So the chip has a single mask register — literally one. The values of this register are cached and protected by gc->lock, which is lowkey the whole safety vibe 🔒✨

💜 SEE ALSO 💜

Kernel file ./kernel/irq/generic-chip.c, plus these absolute icons:

• irq_gc_noop(9)
• irq_gc_mask_disable_reg(9)
• irq_gc_mask_set_bit(9)
• irq_gc_unmask_enable_reg(9)
• irq_gc_ack_set_bit(9)
• irq_gc_ack_clr_bit(9)
• irq_gc_mask_disable_and_ack_set(9)
• irq_gc_eoi(9)
• irq_gc_set_wake(9)
• irq_alloc_generic_chip(9)
• irq_domain_alloc_generic_chips(9)
• irq_domain_remove_generic_chips(9)
• __irq_alloc_domain_generic_chips(9)
• irq_get_domain_generic_chip(9)
• irq_setup_generic_chip(9)
• irq_setup_alt_chip(9)
• irq_remove_generic_chip(9)

later bestie 🫶 — this cutie came from source/version ./kernel/irq, dated October 2026, and it's the irq_gc_mask_clr_bit(9) page. Mwah 💋