intel_dsb_reg_write_indexed(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… intel_dsb_reg_write_indexed β€” from the Kernel API Manual, section 9, bestie

Okay so picture this: you're deep in the kernel, section 9 of the Kernel API Manual, and you need to poke a register through the DSB. That's literally this function's whole job. Let's get into it 🫢


✨ NAME ✨

intel_dsb_reg_write_indexed β€” emit an indexed register write to the DSB context. That's it, that's the vibe πŸŽ€


🌸 SYNOPSIS 🌸

void intel_dsb_reg_write_indexed (struct intel_dsb *dsb , intel_reg_t
reg , u32 val );

Returns nothing (void), takes three things, iconic behavior honestly ✨


πŸ¦‹ ARGUMENTS πŸ¦‹

  • dsb β€” the DSB context. Your main character struct πŸ’œ
  • reg β€” the register address. Where we're writing, bestie πŸ“
  • val β€” the value. What we're writing in there πŸ“

πŸ’… DESCRIPTION πŸ’…

So what this function does is write a register-value pair into the command buffer of the DSB. Like, that's the whole errand. Pair goes in, buffer holds it, slay πŸ’«

Okay but real talk β€” indexed writes are slower than normal MMIO writes when you're only doing a small number of writes to the same register. We're talking less than 5 or so. So if you were thinking "ooh let me index this" for like two writes to the same register… no. Not the move. Not me letting you do that πŸ™ˆ

The 5-or-so cutoff is right there in the original for a reason β€” small batches to the same register = regular MMIO wins the race. Periodt πŸ”₯


🌈 SEE ALSO 🌈

Go read the whole little DSB friend group, they're all connected iykyk πŸ‘‘


⭐ cute sign-off ⭐

That's the tea, bestie β€” this page lives over in ./drivers/gpu/drm/i915/display, dated October 2026, and yeah the footer still says intel_dsb_reg_write_indexed(9) because some things never change πŸ’– Go write some indexed registers (but like, more than five times, please) πŸ¦‹

πŸ“¦ where this page comes from