igc_write_phy_reg_mdic(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ igc_write_phy_reg_mdic(9) ✨

okay so bestie, welcome to the Kernel API Manual πŸ’– you're literally about to read the glow-up guide for igc_write_phy_reg_mdic, and yes it's as niche and as iconic as it sounds πŸŽ€


🌸 NAME 🌸

igc_write_phy_reg_mdic β€” Write MDI control register πŸ‘‘


πŸ¦‹ SYNOPSIS πŸ¦‹

s32 igc_write_phy_reg_mdic (struct igc_hw *hw , u32 offset , u16 data );

πŸ’œ ARGUMENTS πŸ’œ

  • hw β€” pointer to the HW structure 🫢 like, the whole hardware vibe lives here
  • offset β€” register offset to write to ✨ this is where the tea gets spilled
  • data β€” data to write to register at offset πŸ’… the actual content, the main character

πŸ”₯ DESCRIPTION πŸ”₯

Writes data to the MDI control register in the PHY at offset. that's it, that's the whole plot, no cap πŸ’€βœ¨


🌈 SEE ALSO 🌈

Kernel file ./drivers/net/ethernet/intel/igc/igc_phy.c 🧚


fr fr, go read the whole little friend group, they all hang out in ./drivers/net/ethernet/intel/igc πŸ“πŸ’–

and that's the page!! brought to you by the ./drivers/net/ethernet/intel/igc source, dated October 2026, under the Kernel API Manual banner 🌸 mwah, ily, go write some registers responsibly πŸ’…πŸ‘‘

πŸ“¦ where this page comes from