igc_phy_hw_reset(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

okay bestie, meet igc_phy_hw_reset(9) β€” it’s the Kernel API Manual entry for a PHY hardware reset, and it’s lowkey doing important reset choreography 🫢

✨ SYNOPSIS ✨

s32 igc_phy_hw_reset (struct igc_hw *hw );

πŸŽ€ ARGUMENTS πŸŽ€

  • hw β€” pointer to the HW structure. That’s the whole arg list, bestie: one pointer, main character energy.

🌸 DESCRIPTION 🌸

okay so here’s the vibe: first, verify the reset block is not blocking us from resetting. Then acquire the semaphore (if necessary), and read/set/write the device control reset bit in the PHY. Wait the appropriate delay time for the device to reset, and release the semaphore (if necessary). That’s the routine β€” check, semaphore if needed, reset bit read/set/write, delay, release semaphore if needed. slay ✨

πŸ¦‹ SEE ALSO πŸ¦‹

Kernel file: ./drivers/net/ethernet/intel/igc/igc_phy.c β€” that’s where the lore lives πŸ‘‘


mwah πŸ’‹ this cutie comes from ./drivers/net/ethernet/intel/igc, dated October 2026, and the page tag is igc_phy_hw_reset(9). periodt πŸŽ€

πŸ“¦ where this page comes from