igc_write_nvm_srwr(9)

💖 igc_write_nvm_srwr(9) 💖

bestie, welcome to the Kernel API Manual page for igc_write_nvm_srwr(9) — yes, that’s the whole vibe: tiny function, Shadow Ram business, EEWR energy 💅✨

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🌸 NAME 🌸

igc_write_nvm_srwr — write to Shadow Ram using EEWR, periodt 💫

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🦋 SYNOPSIS 🦋

okay so the signature is literally right here, copy it exactly bestie 👇

s32 igc_write_nvm_srwr (struct igc_hw *hw , u16 offset , u16 words , u16
       *data );

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🎀 ARGUMENTS 🎀

• hw — pointer to the HW structure 🫶
• offset — offset within the Shadow Ram to be written to ✨
• words — number of words to write 🔢
• data — 16 bit word(s) to be written to the Shadow Ram 💾

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🌈 DESCRIPTION 🌈

Writes data to Shadow Ram at offset using the EEWR register. slay, but like... carefully 💅

🚨 important caveat bestie: if igc_update_nvm_checksum is not called after this function , the Shadow Ram will most likely contain an invalid checksum. so yeah, don’t skip that step unless you want chaos 😭💀

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👑 SEE ALSO 👑

Kernel file: ./drivers/net/ethernet/intel/igc/igc_i225.c

the whole i225 squad is here too, no cap 🫶:

• igc_acquire_nvm_i225(9)
• igc_release_nvm_i225(9)
• igc_get_hw_semaphore_i225(9)
• igc_acquire_swfw_sync_i225(9)
• igc_release_swfw_sync_i225(9)
• igc_read_nvm_srrd_i225(9)
• igc_write_nvm_srwr_i225(9)
• igc_validate_nvm_checksum_i225(9)
• igc_pool_flash_update_done_i225(9)
• igc_update_flash_i225(9)
• igc_update_nvm_checksum_i225(9)
• igc_get_flash_presence_i225(9)
• igc_init_nvm_params_i225(9)
• igc_set_eee_i225(9)

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xoxo, your kernel bestie 💖 — source/version: ./drivers/net/ethernet/intel/igc; date: October 2026; page: igc_write_nvm_srwr(9).