igc_write_nvm_srwr_i225(9)
π igc_write_nvm_srwr_i225 β the Kernel API Manual glow-up β¨
Okay bestie, so this one lives in the Kernel API Manual and it's literally the igc_write_nvm_srwr_i225 entry β the Shadow RAM writer that uses EEWR. No cap, she's a low-level queen and she has rules. Let's get into it π«Ά
β¨ NAME β¨
igc_write_nvm_srwr_i225 β write to Shadow RAM using EEWR π
π¦ SYNOPSIS π¦
s32 igc_write_nvm_srwr_i225 (struct igc_hw *hw , u16 offset , u16 words , u16 *data );
That's the whole vibe: it returns an s32, takes an hw, an offset, a words count, and a data pointer. Iconic signature, honestly π
π ARGUMENTS π
hwβ pointer to the HW structure. Like, the hardware context bestie, don't leave home without it πoffsetβ offset within the Shadow RAM to be written to. This is where we're writing, periodt πwordsβ number of words to write. Not bytes, not vibes β words π’dataβ 16 bit word(s) to be written to the Shadow RAM. This is the actual payload, the main character energy π
πΈ DESCRIPTION πΈ
So what she does is: writes data to Shadow RAM at offset using the EEWR register. That's the whole job, and she does it β¨
β οΈ Important caveat, bestie, do NOT skip this: if igc_update_nvm_checksum is not called after this function, the data will not be committed to FLASH and also Shadow RAM will most likely contain an invalid checksum. So likeβ¦ call the checksum updater, or your data is lowkey stranded π
π Also important: if an error code is returned, data and Shadow RAM may be inconsistent β buffer partially written. So if she errors out, things can be half-done. Not a slay, just a fact π
π₯ SEE ALSO π₯
Kernel file ./drivers/net/ethernet/intel/igc/igc_i225.c β that's the source file, go read it if you're feeling nerdy π§
igc_acquire_nvm_i225(9)igc_release_nvm_i225(9)igc_get_hw_semaphore_i225(9)igc_acquire_swfw_sync_i225(9)igc_release_swfw_sync_i225(9)igc_read_nvm_srrd_i225(9)igc_write_nvm_srwr(9)igc_validate_nvm_checksum_i225(9)igc_pool_flash_update_done_i225(9)igc_update_flash_i225(9)igc_update_nvm_checksum_i225(9)igc_get_flash_presence_i225(9)igc_init_nvm_params_i225(9)igc_set_eee_i225(9)
Like, the whole friend group is here. It's giving family reunion π«Ά
β¨ cute sign-off time β¨
This little masterpiece comes to you from ./drivers/net/ethernet/intel/igc, dated October 2026, and yeah β it's straight out of the Kernel API Manual. Go write that Shadow RAM, bestie, and remember the checksum update ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms