igc_write_ivar(9)
π NAME π
Hey bestie π welcome to igc_write_ivar(9), straight outta the Kernel API Manual. This page is all about igc_write_ivar β configure ivar for given MSI-X vector. That's the name, that's the vibe, periodt.
β¨ SYNOPSIS β¨
No cap, here's the exact signature:
void igc_write_ivar (struct igc_hw *hw , int msix_vector , int index , int offset );
πΈ ARGUMENTS πΈ
Okay so this function takes four things, and every single one matters:
hwβ pointer to the HW structure. Your hardware main character π«Άmsix_vectorβ vector number we are allocating to a given ring.indexβ row index of IVAR register to write within IVAR table.offsetβ column offset of in IVAR, should be multiple of 8. Lowkey important: multiple of 8, bestie.
π¦ DESCRIPTION π¦
The IVAR table consists of 2 columns, each containing a cause allocation for an Rx and Tx ring, and a variable number of rows depending on the number of queues supported. So it's giving tiny-grid energy: two columns, cause allocation for Rx and Tx rings, and the row count is not fixed β it changes with how many queues are supported. Slay π
π SEE ALSO π
Go be nosy, bestie β these are all the neighbors π:
- Kernel file:
./drivers/net/ethernet/intel/igc/igc_main.c igc_power_up_link(9)igc_release_hw_control(9)igc_get_hw_control(9)igc_clean_tx_ring(9)igc_free_tx_resources(9)igc_free_all_tx_resources(9)igc_clean_all_tx_rings(9)igc_disable_all_tx_rings_hw(9)igc_setup_tx_resources(9)igc_setup_all_tx_resources(9)igc_clean_rx_ring(9)igc_clean_all_rx_rings(9)igc_free_rx_resources(9)igc_free_all_rx_resources(9)igc_setup_rx_resources(9)igc_setup_all_rx_resources(9)igc_configure_rx_ring(9)igc_configure_rx(9)igc_configure_tx_ring(9)igc_configure_tx(9)igc_setup_mrqc(9)igc_setup_rctl(9)igc_setup_tctl(9)igc_set_mac_filter_hw(9)igc_clear_mac_filter_hw(9)igc_set_mac(9)igc_write_mc_addr_list(9)igc_process_skb_fields(9)igc_add_rx_frag(9)igc_reuse_rx_page(9)igc_is_non_eop(9)igc_cleanup_headers(9)igc_alloc_rx_buffers(9)igc_clean_tx_irq(9)igc_add_mac_filter(9)igc_del_mac_filter(9)igc_add_vlan_prio_filter(9)igc_del_vlan_prio_filter(9)igc_add_etype_filter(9)igc_del_etype_filter(9)igc_get_nfc_rule(9)igc_del_nfc_rule(9)igc_add_nfc_rule(9)igc_enable_empty_addr_recv(9)igc_set_rx_mode(9)igc_configure(9)igc_configure_msix(9)igc_irq_enable(9)igc_irq_disable(9)igc_reset_q_vector(9)igc_free_q_vector(9)igc_free_q_vectors(9)igc_update_itr(9)igc_set_interrupt_capability(9)igc_update_ring_itr(9)igc_cache_ring_register(9)igc_poll(9)igc_alloc_q_vector(9)igc_alloc_q_vectors(9)igc_init_interrupt_scheme(9)igc_sw_init(9)igc_up(9)igc_update_stats(9)igc_down(9)igc_change_mtu(9)igc_tx_timeout(9)igc_get_stats64(9)igc_msix_other(9)igc_request_msix(9)igc_clear_interrupt_scheme(9)igc_has_link(9)igc_watchdog(9)igc_intr_msi(9)igc_intr(9)igc_request_irq(9)__igc_open(9)__igc_close(9)igc_probe(9)igc_remove(9)igc_io_error_detected(9)igc_io_slot_reset(9)igc_io_resume(9)igc_reinit_queues(9)igc_get_hw_dev(9)igc_init_module(9)igc_exit_module(9)
Source / version / date sign-off: ./drivers/net/ethernet/intel/igc Β· October 2026 Β· igc_write_ivar(9) β mwah, bye bestie πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms