ice_txclk_get_pin(9)

💅 ice_txclk_get_pin(9) — the kernel API manual, but make it cute 🎀

okay so picture this: you're deep in the ice driver, it's giving kernel API manual, and you need to know which DPLL pin a TX reference clock maps to. bestie, this page is literally your answer. sheet music for the group chat 🦋

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✨ NAME ✨

ice_txclk_get_pin — map that TX reference clock to its DPLL pin, no cap 🔥

🌸 SYNOPSIS 🌸

struct dpll_pin * ice_txclk_get_pin (struct ice_pf *pf , enum
       ice_e825c_ref_clk ref_clk );

like, you hand it a PF and a ref clock, it hands you a pin. simple as 🫶

🧚 ARGUMENTS 🧚

• pf — pointer to the PF structure. yes, that PF. the one you already have. 💅
• ref_clk — the TX reference clock selection. you're picking which clock, bestie, choose wisely ✨

👑 DESCRIPTION 👑

So the whole vibe here: this function returns the DPLL pin corresponding to a given external TX reference clock. that's it. that's the gig. 💖

But here's the tea — only the external TX reference clocks (SYNCE and EREF0) are represented as DPLL pins. The internal ENET (TXCO) clock has no associated DPLL pin and therefore yields NULL. so if you were expecting a pin for TXCO… nope, it's giving nothing, NULL, empty-handed, ghosted you 🙈

This helper is used when emitting DPLL pin change notifications after TX reference clock transitions have been verified. lowkey important, highkey niche. iykyk ⭐

🌈 RETURN 🌈

Pointer to the corresponding struct dpll_pin — slay, you got your pin 👑

…or NULL if the TX reference clock has no DPLL pin representation. not every clock gets a pin, and that's okay 💀

🎀 SEE ALSO 🎀

Kernel file ./drivers/net/ethernet/intel/ice/ice_txclk.c — go read it, it's literally right there 📖

• ice_txclk_enable_peer(9)
• ice_txclk_set_clk(9)
• ice_txclk_update_and_notify(9)

the whole friend group, fr fr 🫶

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and that's the page! brought to you by ./drivers/net/ethernet/intel/ice, dated October 2026 — mwah, go touch some registers 💜✨