ice_txclk_enable_peer(9)
π ice_txclk_enable_peer β bestie edition
ok so this is a page from the Kernel API Manual, and we're talking about ice_txclk_enable_peer(9). Strap in, it's actually not that deep, i promise π«Ά
β¨ NAME β¨
ice_txclk_enable_peer β literally just enables the required TX reference clock on the peer PHY. that's the whole vibe. π
πΈ SYNOPSIS πΈ
int ice_txclk_enable_peer (struct ice_pf *pf , enum ice_e825c_ref_clk
clk );
like yes, that's the whole signature, no cap β¨
π¦ ARGUMENTS π¦
pfβ pointer to the PF structure. just a pointer, she's pointing at stuff, iconic behavior πclkβ the TX reference clock that must be enabled. this is the one we're turning on, main character energy frfr π
π DESCRIPTION π
okay so listen. some TX reference clocks on E825-class devices (we're talking SyncE and EREF0 here) have to be enabled on both PHY complexes so that routing actually works properly. it's giving teamwork, it's giving "we do this together or not at all" π
the rules, and yes there are rules:
- SyncE must be enabled on both PHYs when it's used by PHY0 π
- EREF0 must be enabled on both PHYs when it's used by PHY1 β
so if the requested clock isn't enabled on the peer PHY yet, we enable it. simple as that. slay. π
heads up bestie: ENET does not require duplication, so it gets ignored. don't come for it, it's just living its life π
π₯ RETURN π₯
0on success π- negative error code on failure π (she tried her best)
π§ SEE ALSO π§
- Kernel file
./drivers/net/ethernet/intel/ice/ice_txclk.cπ ice_txclk_get_pin(9)ice_txclk_set_clk(9)ice_txclk_update_and_notify(9)
like, go read those too, they're all part of the same friend group fr fr π
ok that's the whole page!! π this gem lives in ./drivers/net/ethernet/intel/ice, dated October 2026, and the manual credits it as ice_txclk_enable_peer(9). periodt. β¨ππ¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms