ice_tspll_cfg_e82x(9)

📦 version 7.3.1, in nixpkgs unstable

✨ ice_tspll_cfg_e82x(9) ✨

okay so bestie, welcome to the Kernel API Manual entry for ice_tspll_cfg_e82x — this is the one that sets up the Clock Generation Unit TSPLL and honestly it's giving main character energy for the whole PTP situation 💅

🎀 NAME 🎀

ice_tspll_cfg_e82x — configure the Clock Generation Unit TSPLL. yes that is the whole vibe. it configures the CGU's TSPLL. periodt.

🌸 SYNOPSIS 🌸

int ice_tspll_cfg_e82x (struct ice_hw *hw , enum ice_tspll_freq clk_freq
, enum ice_clk_src clk_src );

like, three args, returns an int, that's the whole thing 🫶

🦋 ARGUMENTS 🦋

  • hw — pointer to the HW struct. the whole hardware situation lives in here, so hand it over 💖
  • clk_freq — the clock frequency you wanna program. this is the "how fast" of it all ⭐
  • clk_src — the clock source you're selecting. your options are TIME_REF or TCXO, pick one, don't be weird about it 🙈

💜 DESCRIPTION 💜

so what this does is configure the Clock Generation Unit with the clock frequency and time reference you want, and it enables the PLL — which is the thing driving the PTP hardware clock. no PLL, no clock, and then everything downstream is just sitting there like 😭

basically: you say "here's my frequency, here's my source", and it goes and makes it happen, lowkey iconic of it honestly 🔥

⭐ RETURN ⭐

  • 0 — success 🎉 slay, it worked
  • -EINVAL — the input parameters are incorrect. you gave it something it can't work with, no cap 💀
  • -EBUSY — it failed to lock the TSPLL. the lock did not lock 😭
  • other — CGU read/write failure. something went sideways on the register access side of things, sorry bestie 🙈

🌈 SEE ALSO 🌈

all of those are your little friends in the ice_tspll friend group, go say hi 🫶✨

and that's the page!! it lives at ./drivers/net/ethernet/intel/ice and the version/date situation is October 2026 — so mark your calendar bestie, this manual page is from the future 🎀💖 bye!

📦 where this page comes from