ice_tspll_cf...ss_mux_e825c(9)

🎀 NAME 🎀

okay so bestie, welcome to the ice_tspll_cf...ss_mux_e825c(9) page in the Kernel API Manual 💖. This little icon is ice_tspll_cfg_bypass_mux_e825c, and its whole job is to configure the reference clock mux. slay.

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✨ SYNOPSIS ✨

int ice_tspll_cfg_bypass_mux_e825c (struct ice_hw *hw , bool ena , u32
       port_num , enum ice_synce_clk output );

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🦋 ARGUMENTS 🦋

• hw — pointer to the HW struct 🫶
• ena — true to enable the reference, false if disable — literally the on/off vibe.
• port_num — number of the port 🔢
• output — output pin, and bestie, we have two in E825C 👑

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💖 DESCRIPTION 💖

It sets the reference clock source and the output clock selection. That’s the whole tea ☕✨.

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🧚 CONTEXT 🧚

Called under pf->dplls.lock 🔒 — so keep that lock context in mind, no cap.

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🔥 RETURN 🔥

• 0 — success ✨
• negative — error 😭

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🌈 SEE ALSO 🌈

• Kernel file ./drivers/net/ethernet/intel/ice/ice_tspll.c 📁
• ice_tspll_clk_freq_str(9)
• ice_tspll_default_freq(9)
• ice_tspll_check_params(9)
• ice_tspll_clk_src_str(9)
• ice_tspll_log_cfg(9)
• ice_tspll_cfg_e82x(9)
• ice_tspll_dis_sticky_bits_e82x(9)
• ice_tspll_cfg_e825c(9)
• ice_tspll_dis_sticky_bits_e825c(9)
• ice_tspll_cfg_pps_out_e825c(9)
• ice_tspll_cfg(9)
• ice_tspll_dis_sticky_bits(9)
• ice_tspll_init(9)
• ice_tspll_bypass_mux_active_e825c(9)
• ice_tspll_get_div_e825c(9)
• ice_tspll_cfg_synce_ethdiv_e825c(9)

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with love from ./drivers/net/ethernet/intel/ice, October 2026 — ice_tspll_cf...ss_mux_e825c(9) out 💅✨