HM2_RPSPI(9)

💖 HM2_RPSPI 💖

okay bestie, gather round, because this is the hm2_rpspi page from the HAL Component section of the manual, and it's genuinely so much. It's a LinuxCNC HAL driver for Mesa Electronics SPI Anything IO boards running HostMot2 firmware. No cap. Let's get into it. 🦋

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✨ NAME ✨

hm2_rpspi — the LinuxCNC HAL driver for the Mesa Electronics SPI Anything IO boards, with HostMot2 firmware. That's the whole vibe. 💅

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🌸 SYNOPSIS 🌸

loadrt hm2_rpspi

and then you feed it these, bestie:

• config [default: ""] — the HostMot2 config strings. They're described over in the hostmot2(9) manpage, so go read that one too. 💜
• spiclk_rate [default: 31250] — sets the SPI clock rate in kHz. Check the SPI CLOCK RATES section below, it's important. ⭐
• spiclk_rate_rd [default: -1 (which means "same as spiclk_rate")] — sets the SPI read clock rate in kHz. Usually you read and write at the same speed, lowkey. But if the round-trip is taking too long you might wanna slow the reading down (again, see SPI CLOCK RATES below). 🎀
• spiclk_base [default: 400000000] — this is the SPI clock divider calculation fallback value. Normally the base rate gets read from /sys/kernel/debug/clk/vpu/clk_rate and used in the divider calculation (on the Rpi3 it should be 250 MHz). spiclk_base only kicks in as a fallback if the system's can't be read. It's normally safe — and recommended, fr fr — to just leave this parameter as is. You should set this manually to 250000000 if your system doesn't give access to the kernel clock settings. Otherwise your SPI clock frequency will be only 62.5% of the requested value. 😭
• spi_pull_miso [default: 1 (pull-down)]
• spi_pull_mosi [default: 1 (pull-down)]
• spi_pull_sclk [default: 1 (pull-down)] These turn pull-up/pull-down on or off for the SPI lines. A value of 0 disables any pull-up/down on the pin. A value of 1 means pull-down and 2 means pull-up. The chip enable line(s) are always pull-up enabled. periodt.
• spi_probe [default: 1] — probes the SPI port and CE lines for a card. It's a bit-field telling the driver which combinations of SPI and CE to probe:
  • 1 = SPI0/CE0,
  • 2 = SPI0/CE1,
  • 4 = SPI1/CE0,
  • 8 = SPI1/CE1,
  • 16 = SPI1/CE2.

The probe happens exactly in the order above. Any boards it finds get numbered 0...4 in the order found. See also INTERFACE CONFIGURATION below. 🫶

It is an error if a probe fails and the driver will abort. 🚨

The SPI0/SPI1 peripherals live at GPIO pins (with the 40-pin I/O header pin-number in parentheses):

• SPI0: MOSI=10(19), MISO=9(21), SCLK=11(23), CE0=8(24), CE1=7(26)
• SPI1: MOSI=20(38), MISO=19(35), SCLK=21(40), CE0=18(12), CE1=17(11), CE2=16(36)

• spi_debug [default: -1] — sets the message level of the running process. The message level gets set if spi_debug is a positive value between 0 and 5, where 0 means no messages at all and 5 means everything. A value of -1 doesn't touch the current message level.

Caveat Emptor: changing the message level is process-wide and all modules within the process will spit out messages at the requested level. This may cause quite some clutter in your terminal. 💀

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🌈 DESCRIPTION 🌈

hm2_rpspi is a device driver for the Raspberry Pi 2/3 that interfaces Mesa's SPI based Anything I/O boards (with the HostMot2 firmware) to the LinuxCNC HAL. This driver is not based on the linux spidev driver — it's based on a dedicated BCM2835-SPI driver. Different breed. 😌

It is strongly recommended that you unload/disable the kernel's spidev driver by disabling it using raspi-config. Heads up bestie: having both kernel and user-space SPI drivers installed can result in unexpected interactions and system instabilities. 🙈

The supported boards are: 7I90HD.

The board must have a compatible firmware (ie.: 7i90_spi_svst4_8.bit) loaded on the board by the mesaflash(1) program.

hm2_rpspi is only available when LinuxCNC is configured with "uspace" realtime. It works with Raspian and PREEMPT_RT kernel. ✨

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🧚 INTERFACE CONFIGURATION 🧚

Up to five devices (7i90 boards) are supported. Two on SPI0 and three on SPI1. It is recommended that you, at most, use two devices and each device connected to a separate SPI port. You get to choose which CE lines you prefer, or fit the design and set up the spi_probe parameter to tell the driver where to go search for the board(s). 👑

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🔥 REALTIME PERFORMANCE OF THE BCM2835-SPI DRIVER 🔥

TBD.

(it's giving mystery. it's giving unfinished business. we respect it.) 💅

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⭐ SPI CLOCK RATES ⭐

The maximum SPI clock of the BCM2835-SPI driver and the 7i90 is documented over 32MHz. The SPI driver can provide frequencies well beyond what is acceptable for the 7i90. A safe value to start with would be 12.5 MHz (spiclk_rate=12500) and then work your way up from there. 🌸

The SPI driver generates (very) discrete clock frequency values, especially in the MHz range, because of a simple clock divider structure. The base frequency is 250 MHz and the divider for SPI0/SPI1 scales using discrete factors. Here's the list of spiclk_rate settings and the discrete SPI clock frequency (250 MHz / (2n) for n > 1):

• 62500 - 62.500 MHz,
• 41667 - 41.667 MHz,
• 31250 - 31.250 MHz,
• 25000 - 25.000 MHz,
• 20834 - 20.833 MHz,
• 17858 - 17.857 MHz,
• 15625 - 15.625 MHz,
• 13889 - 13.889 MHz,
• 12500 - 12.500 MHz,
• 11364 - 11.364 MHz,
• 10417 - 10.417 MHz,
• 9616 - 9.615 MHz,
• ....

The lowest selectable SPI clock frequency is 30 kHz (spiclk_rate=30) for SPI0 and SPI1. Theoretically the SPI0 port could go slower, but there is no point in doing so. You should not expect any real-time performance with such a slow setting, unless your machine is located next to a black hole. 🕳️

The highest SPI clock frequency is, theoretically, 125 MHz. However, you will not be able to build any reliable hardware interface at that frequency. The driver limits the clock to 62.5 MHz (cpiclk_rate=62500). The chances are rather slim that you get the interface to work reliably at this frequency. The 7i90 interface only supports frequencies up to 50 MHz, and that is with perfect cabling and impedance matching (in write direction only). 😭

Writing to the 7i90 may be done faster than reading. This is especially important if you have "long" wires or any buffers on the SPI-bus path. You can set the read clock frequency to a lower value (using spiclk_rate_rd) to counter the effects of the SPI-bus round-trip needed for read actions. For example, you can write at 41.67 MHz and read at 25.00 MHz. 🎀

It should be noted that the Rpi3 must have an adequate 5V power supply and the power should be properly decoupled right on the 40-pin I/O header. At high speeds and noise on the supply, there is the possibility of noise throwing off the SoC's PLL(s), resulting in strange behaviour. 💀

For optimal performance on the Rpi3, you must disable the "ondemand" CPU frequency governor. You may add the following to your /etc/rc.local file:

echo -n 1200000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_min_freq
echo -n performance > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor

Be sure to have a proper heatsink mounted on the SoC or it will get too warm and crash. 🔥

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💜 SEE ALSO 💜

hostmot2(9)

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🎀 LICENSE 🎀

GPL

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okay that's the whole page, bestie, you ate. 💖✨ and before you go — this was LinuxCNC Documentation, dated 2017-06-05, serving you the HM2_RPSPI(9) page. slay, go build something iconic 🦋💅