gfx_v7_0_select_se_sh(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… gfx_v7_0_select_se_sh β€” Kernel API Manual ✨

okay bestie, so this is gfx_v7_0_select_se_sh(9), straight out of the Kernel API Manual, and it's literally the little function that picks which SE and SH you're talking to. no cap, that's the whole vibe.


🌸 NAME 🌸

gfx_v7_0_select_se_sh β€” select which SE, SH to address 🎯


✨ SYNOPSIS ✨

void gfx_v7_0_select_se_sh (struct amdgpu_device *adev , u32 se_num ,
       u32 sh_num , u32 instance , int xcc_id );

like, that's it. that's the whole signature. she's not returning anything (void, queen of minding her own business) β€” she's just setting things up so the next register poke lands in the right place 🫢


πŸŽ€ ARGUMENTS πŸŽ€

  • adev β€” amdgpu_device pointer. your main character struct, basically. πŸ’–
  • se_num β€” shader engine to address. which SE we're pointing at, periodt. πŸ”₯
  • sh_num β€” sh block to address. and this one's which SH inside it. 🌸
  • instance β€” Certain registers are instanced per SE or SH. 0xffffffff means broadcast to all SEs or SHs (CIK). πŸ‘‘ so like, if you want everyone to hear it instead of just one little block, that's your magic value β€” and heads up, that broadcast behavior is specifically a CIK thing. iykyk πŸ’…
  • xcc_id β€” xcc accelerated compute core id. Select which SE, SH combinations to address. πŸ¦‹ that's the doc's own words, not me being cute (okay, maybe a little cute).
ngl the xcc_id description in the original genuinely does read like "select which SE, SH combinations to address" β€” so that's the info, verbatim, no notes. take it as written. πŸ™ˆ

🌈 SEE ALSO 🌈

kernel file ./drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c β€” go read the source, bestie, she's right there πŸ’œ

and the whole friend group of related functions, all of them, no skips:

gfx_v7_0_init_microcode(9), gfx_v7_0_tiling_mode_table_init(9), gfx_v7_0_get_rb_active_bitmap(9), gfx_v7_0_setup_rb(9), gfx_v7_0_init_compute_vmid(9), gfx_v7_0_constants_init(9), gfx_v7_0_ring_test_ring(9), gfx_v7_0_ring_emit_hdp_flush(9), gfx_v7_0_ring_emit_fence_gfx(9), gfx_v7_0_ring_emit_fence_compute(9), gfx_v7_0_ring_emit_ib_gfx(9), gfx_v7_0_ring_test_ib(9), gfx_v7_0_cp_gfx_enable(9), gfx_v7_0_cp_gfx_load_microcode(9), gfx_v7_0_cp_gfx_start(9), gfx_v7_0_cp_gfx_resume(9), gfx_v7_0_cp_compute_enable(9), gfx_v7_0_cp_compute_load_microcode(9), gfx_v7_0_cp_compute_resume(9), gfx_v7_0_ring_emit_pipeline_sync(9), gfx_v7_0_ring_emit_vm_flush(9), gfx_v7_0_rlc_stop(9), gfx_v7_0_rlc_start(9), gfx_v7_0_rlc_resume(9), gfx_v7_0_get_gpu_clock_counter(9), gfx_v7_0_get_hdp_flush_mask(9) ⭐


and that's the whole page, bestie. no crumbs left behind πŸ“

so yeah β€” this icon lives in ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and the page itself is gfx_v7_0_select_se_sh(9). slay. see u in the kernel source πŸ’…βœ¨πŸ§š

πŸ“¦ where this page comes from