ENUM DPU_ENC_RC_EVENTS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… enum dpu_enc_rc_events β€” events for resource control state machine

okay bestie, so this is from the Kernel API Manual (section 9, the kernel-API girlies know), and it's literally just the enum that feeds the resource control state machine. think of it as the group chat where every event tells the RC state machine what mood to be in. no cap. πŸ¦‹


✨ SYNOPSIS ✨

like, here's the whole thing in one go, keep it exactly as is:

enum dpu_enc_rc_events {
    DPU_ENC_RC_EVENT_KICKOFF ,
    DPU_ENC_RC_EVENT_FRAME_DONE ,
    DPU_ENC_RC_EVENT_PRE_STOP ,
    DPU_ENC_RC_EVENT_STOP ,
    DPU_ENC_RC_EVENT_ENTER_IDLE

};

🌸 CONSTANTS 🌸

okay so these are the members, and each one has very specific main character energy. let me break them down for you 🫢

  • DPU_ENC_RC_EVENT_KICKOFF β€” this one happens at NORMAL priority, and it's literally the event that signals the start of the transfer. the moment it lands, you enable the MDP/DSI core clocks. and bestie, regardless of the previous state, the resource should be in ON state at the end of this event. periodt. πŸ”₯
  • DPU_ENC_RC_EVENT_FRAME_DONE β€” this one happens at INTERRUPT level, ooh fancy. it signals the end of the data transfer after the PP FRAME_DONE event. and at the end of this event, a delayed work is scheduled to go to IDLE_PC state after IDLE_TIMEOUT time. so it's giving "see you in a bit" energy. ⏳
  • DPU_ENC_RC_EVENT_PRE_STOP β€” NORMAL priority again. when this is received during the ON state, it leaves the RC STATE in the PRE_OFF state. it should be followed by the STOP event as part of encoder disable. but if it's received during IDLE or OFF states? it will do literally nothing. respectfully. πŸ’€
  • DPU_ENC_RC_EVENT_STOP β€” NORMAL priority. when this lands, you disable all the MDP/DSI core clocks, and disable IRQs. it should be called from the PRE_OFF or IDLE states. IDLE is expected when IDLE_PC has run, and PRE_OFF did nothing. PRE_OFF is expected when PRE_STOP was executed during the ON state. resource state should be in OFF at the end of the event. iconic shutdown behaviour ngl. πŸ›‘
  • DPU_ENC_RC_EVENT_ENTER_IDLE β€” NORMAL priority, and it comes from a work item. this event signals that there were no frame updates for IDLE_TIMEOUT time. that would disable the MDP/DSI core clocks and change the resource state to IDLE. nap time bestie 😴✨

πŸŽ€ SEE ALSO πŸŽ€

so the kernel file is ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c, and struct dpu_encoder_virt(9) is the headliner β€” plus a whole ensemble cast, all of these besties:

dpu_encoder_get_drm_fmt(9), dpu_encoder_needs_periph_flush(9), dpu_encoder_is_widebus_enabled(9), dpu_encoder_is_dsc_enabled(9), dpu_encoder_get_crc_values_cnt(9), dpu_encoder_setup_misr(9), dpu_encoder_get_crc(9), dpu_encoder_helper_report_irq_timeout(9), dpu_encoder_helper_wait_for_irq(9), dpu_encoder_get_vsync_count(9), dpu_encoder_get_linecount(9), dpu_encoder_helper_split_config(9), dpu_encoder_use_dsc_merge(9), dpu_encoder_get_dsc_config(9), dpu_encoder_prepare_wb_job(9), dpu_encoder_cleanup_wb_job(9), dpu_encoder_virt_runtime_resume(9), dpu_encoder_vblank_callback(9), dpu_encoder_underrun_callback(9), dpu_encoder_assign_crtc(9), dpu_encoder_toggle_vblank_for_crtc(9), dpu_encoder_frame_done_callback(9), _dpu_encoder_trigger_flush(9), _dpu_encoder_trigger_start(9), dpu_encoder_helper_trigger_start(9), _dpu_encoder_kickoff_phys(9), dpu_encoder_trigger_kickoff_pending(9), dpu_encoder_vsync_time(9), dpu_encoder_prepare_for_kickoff(9), dpu_encoder_is_valid_for_commit(9), dpu_encoder_start_frame_done_timer(9), dpu_encoder_kickoff(9), dpu_encoder_helper_phys_cleanup(9), dpu_encoder_helper_phys_setup_cdm(9), dpu_encoder_get_clones(9), dpu_encoder_init(9), dpu_encoder_wait_for_commit_done(9), dpu_encoder_wait_for_tx_complete(9), dpu_encoder_get_intf_mode(9), dpu_encoder_helper_get_cwb_mask(9), dpu_encoder_helper_get_dsc(9).


πŸ’– that's the whole page bestie, no crumbs left behind. every event, every state, every priority β€” all accounted for.

and that's a wrap! this one lives under ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026 β€” so like, future girlie energy fr fr. mwah πŸ’‹πŸŒˆ

πŸ“¦ where this page comes from