dpu_encoder_setup_misr(9)
okay so real talk β this page comes straight out of the Kernel API Manual, and it's about one tiny little function that flips on MISR calculations. short page, huge vibes. let's get into it π
β¨ NAME β¨
dpu_encoder_setup_misr β enable misr calculations
like, that's it. that's the whole job. it sets up MISR, and MISR is doing calculations, and now they're enabled. iconic minimalism fr π
πΈ SYNOPSIS πΈ
void dpu_encoder_setup_misr (const struct drm_encoder *drm_enc );
notice how it returns void? yeah. it's giving "i do the thing and i don't report back." no return value, no drama, no exit codes. periodt.
π¦ ARGUMENTS π¦
drm_encβ Pointer to a previously created drm encoder structure. key word: previously. you gotta have your encoder already made before you call this, bestie. it's aconst struct drm_encoder *, so we're looking, not touching π«Ά
π₯ SEE ALSO π₯
bestie. buckle up. this is the see-also section and it is long. like, the whole dpu encoder family reunion is here. all of these are (9) manpage refs, and the source of truth lives in the kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c β that's the file, no cap:
enum dpu_enc_rc_events(9)struct dpu_encoder_virt(9)dpu_encoder_get_drm_fmt(9)dpu_encoder_needs_periph_flush(9)dpu_encoder_is_widebus_enabled(9)dpu_encoder_is_dsc_enabled(9)dpu_encoder_get_crc_values_cnt(9)dpu_encoder_get_crc(9)dpu_encoder_helper_report_irq_timeout(9)dpu_encoder_helper_wait_for_irq(9)dpu_encoder_get_vsync_count(9)dpu_encoder_get_linecount(9)dpu_encoder_helper_split_config(9)dpu_encoder_use_dsc_merge(9)dpu_encoder_get_dsc_config(9)dpu_encoder_prepare_wb_job(9)dpu_encoder_cleanup_wb_job(9)dpu_encoder_virt_runtime_resume(9)dpu_encoder_vblank_callback(9)dpu_encoder_underrun_callback(9)dpu_encoder_assign_crtc(9)dpu_encoder_toggle_vblank_for_crtc(9)dpu_encoder_frame_done_callback(9)_dpu_encoder_trigger_flush(9)_dpu_encoder_trigger_start(9)dpu_encoder_helper_trigger_start(9)_dpu_encoder_kickoff_phys(9)dpu_encoder_trigger_kickoff_pending(9)dpu_encoder_vsync_time(9)dpu_encoder_prepare_for_kickoff(9)dpu_encoder_is_valid_for_commit(9)dpu_encoder_start_frame_done_timer(9)dpu_encoder_kickoff(9)dpu_encoder_helper_phys_cleanup(9)dpu_encoder_helper_phys_setup_cdm(9)dpu_encoder_get_clones(9)dpu_encoder_init(9)dpu_encoder_wait_for_commit_done(9)dpu_encoder_wait_for_tx_complete(9)dpu_encoder_get_intf_mode(9)dpu_encoder_helper_get_cwb_mask(9)dpu_encoder_helper_get_dsc(9)
and that's the whole guest list. no plus-ones, no shortcuts, we listed every single one πβ¨
lowkey a reminder: the only source dir mentioned on this page is ./drivers/gpu/drm/msm/disp/dpu1 β that's where the goods live. don't go looking anywhere else on my watch π
and that's the page!! biggest shoutout to that ./drivers/gpu/drm/msm/disp/dpu1 directory and to the October 2026 date stamp β this one's dated October 2026, bestie, and it's dpu_encoder_setup_misr(9) all the way down. slay, bye π§π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms