dpu_encoder...ys_setup_cdm(9)

✨ NAME ✨

dpu_encoder_helper_phys_setup_cdm — bestie, this is the one that sets up your chroma down sampling block 💅

(it's a page from the Kernel API Manual, and yes the title up top reads dpu_encoder...ys_setup_cdm(9) because manpage names are always a little dramatic and truncated 💀)

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🌸 SYNOPSIS 🌸

void dpu_encoder_helper_phys_setup_cdm (struct dpu_encoder_phys
*phys_enc , const struct msm_format *dpu_fmt , u32 output_type );

okay so it returns void — nothing comes back, it just does the thing — and it takes three args. no cap, that's the whole vibe 💖

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🎀 ARGUMENTS 🎀

• phys_enc — pointer to the physical encoder 🫶 like, the encoder itself, in physical form
• dpu_fmt — pointer to the format description ✨ (the description of the format, obviously, she's telling you what things look like)
• output_type — HDMI/WB 🌈 those are literally your two options, pick your fighter

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🦋 SEE ALSO 🦋

so like, this function lives its best life in the kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c — icon behavior, truly 👑

and here's the whole friend group, in the order the manpage lists them (yes, all of them, I'm not skipping a single one, we don't do that here 💜):

• enum dpu_enc_rc_events(9)
• struct dpu_encoder_virt(9)
• dpu_encoder_get_drm_fmt(9)
• dpu_encoder_needs_periph_flush(9)
• dpu_encoder_is_widebus_enabled(9)
• dpu_encoder_is_dsc_enabled(9)
• dpu_encoder_get_crc_values_cnt(9)
• dpu_encoder_setup_misr(9)
• dpu_encoder_get_crc(9)
• dpu_encoder_helper_report_irq_timeout(9)
• dpu_encoder_helper_wait_for_irq(9)
• dpu_encoder_get_vsync_count(9)
• dpu_encoder_get_linecount(9)
• dpu_encoder_helper_split_config(9)
• dpu_encoder_use_dsc_merge(9)
• dpu_encoder_get_dsc_config(9)
• dpu_encoder_prepare_wb_job(9)
• dpu_encoder_cleanup_wb_job(9)
• dpu_encoder_virt_runtime_resume(9)
• dpu_encoder_vblank_callback(9)
• dpu_encoder_underrun_callback(9)
• dpu_encoder_assign_crtc(9)
• dpu_encoder_toggle_vblank_for_crtc(9)
• dpu_encoder_frame_done_callback(9)
• _dpu_encoder_trigger_flush(9)
• _dpu_encoder_trigger_start(9)
• dpu_encoder_helper_trigger_start(9)
• _dpu_encoder_kickoff_phys(9)
• dpu_encoder_trigger_kickoff_pending(9)
• dpu_encoder_vsync_time(9)
• dpu_encoder_prepare_for_kickoff(9)
• dpu_encoder_is_valid_for_commit(9)
• dpu_encoder_start_frame_done_timer(9)
• dpu_encoder_kickoff(9)
• dpu_encoder_helper_phys_cleanup(9)
• dpu_encoder_get_clones(9)
• dpu_encoder_init(9)
• dpu_encoder_wait_for_commit_done(9)
• dpu_encoder_wait_for_tx_complete(9)
• dpu_encoder_get_intf_mode(9)
• dpu_encoder_helper_get_cwb_mask(9)
• dpu_encoder_helper_get_dsc(9)

that's a lot of siblings but they're all slaying in their own lane, iykyk 😭🔥

quick vibe check: this page is filed under ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and it's part of the Kernel API Manual — so like, go read the actual source before you commit anything cursed, fr fr 🙈

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and that's the page!! 🍓 thanks for reading bestie, go set up that chroma down sampling block, you're gonna eat 💅✨🧚‍♀️🫶