dcn351_hw_block_power_down(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… dcn351_hw_block_power_down πŸ’…

okay so this is a page from the Kernel API Manual (dcn351_hw_block_power_down(9)) and bestie it's literally the power down sequence β€” like the goodbye routine for a hardware block. no cap. πŸŽ€


✨ NAME ✨

dcn351_hw_block_power_down β€” power down sequence πŸ’€


πŸ¦‹ SYNOPSIS πŸ¦‹

void dcn351_hw_block_power_down (struct dc *dc , struct pg_block_update
*update_state );

🌸 ARGUMENTS 🌸

  • dc β€” the Current DC state, your main character struct fr 🫢
  • update_state β€” updates the PG sequence states for the HW block, iykyk ✨

πŸ’– DESCRIPTION πŸ’–

so the following sequence describes the ON-OFF (ONO) for power down, and it goes in this exact order β€” don't shuffle it, this is not a playlist bestie 😭

  • ONO Region 11, DCPG 19: dsc3
  • ONO Region 10, DCPG 3: dchubp3, dpp3
  • ONO Region 9, DCPG 18: dsc2
  • ONO Region 8, DCPG 2: dchubp2, dpp2
  • ONO Region 7, DCPG 17: dsc1
  • ONO Region 6, DCPG 1: dchubp1, dpp1
  • ONO Region 5, DCPG 16: dsc0
  • ONO Region 4, DCPG 0: dchubp0, dpp0
  • ONO Region 3, DCPG 25: hpo β€” SKIPPED. Should be kept on 🫣
  • ONO Region 2, DCPG 24: mpc, opp, optc, dwb
  • ONO Region 1, DCPG 23: dchubbub, dchvm, dchubbubmem β€” SKIPPED. PMFW will pwr dwn at IPS2 entry πŸ’€
  • ONO Region 0, DCPG 22: dccg, dio, dcio β€” SKIPPED. will be pwr dwn after lono timer is armed ⏰
the SKIPPED ones are genuinely skipped bestie, not me forgetting them β€” that's what the source says so that's what we're saying πŸ’…

πŸ”₯ SEE ALSO πŸ”₯

  • Kernel file ./drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c πŸ‘‘
  • dcn351_hw_block_power_up(9) β€” the reverse glow-up ✨

aaaand that's the whole page! πŸ“ sign-off time: this icon came from ./drivers/gpu/drm/amd/display/..., dated October 2026, and it goes out to dcn351_hw_block_power_down(9) itself β€” periodt. πŸ’œπŸ§š

πŸ“¦ where this page comes from