_base_mpi_ep_writeq(9)

✨ NAME ✨

_base_mpi_ep_writeq — 32 bit write to MMIO. This page is from the Kernel API Manual, bestie, and it’s giving “tiny helper with a very specific job” energy.

🌸 SYNOPSIS 🌸

void _base_mpi_ep_writeq (__u64 b , volatile void __iomem *addr , spinlock_t *writeq_lock );

🎀 ARGUMENTS 🎀

• b — the data payload, no cap.
• addr — address in MMIO space. That’s where the write goes.
• writeq_lock — a spin lock. Keep it cute, keep it locked.

🦋 DESCRIPTION 🦋

Okay so: this is special handling for MPI EP. It takes care of the 32 bit environment where its not quarenteed to send the entire word in one transfer. That’s the whole reason this function exists, and honestly? Iconic of it.

Bestie, that 32 bit environment detail is the main-character plot point here. Do not lose it.

🫶 SEE ALSO 🫶

Kernel file: ./drivers/scsi/mpt3sas/mpt3sas_base.c

Also, the entire mpt3sas bestie roll call — every single reference, fr fr:

mpt3sas_base_check_cmd_timeout(9)
_scsih_set_fwfault_debug(9)
_base_readl_aero(9)
_base_clone_reply_to_sys_mem(9)
_base_clone_mpi_to_sys_mem(9)
_base_clone_to_sys_mem(9)
_base_get_chain(9)
_base_get_chain_phys(9)
_base_get_buffer_bar0(9)
_base_get_buffer_phys_bar0(9)
_base_get_chain_buffer_dma_to_chain_buffer(9)
_clone_sg_entries(9)
mpt3sas_remove_dead_ioc_func(9)
_base_sync_drv_fw_timestamp(9)
_base_fault_reset_work(9)
mpt3sas_base_start_watchdog(9)
mpt3sas_base_stop_watchdog(9)
mpt3sas_base_fault_info(9)
mpt3sas_base_coredump_info(9)
mpt3sas_base_wait_for_coredump_completion(9)
mpt3sas_halt_firmware(9)
_base_sas_ioc_info(9)
_base_display_event_data(9)
_base_sas_log_info(9)
_base_display_reply_info(9)
mpt3sas_base_done(9)
_base_async_event(9)
_base_get_cb_idx(9)
mpt3sas_base_pause_mq_polling(9)
mpt3sas_base_resume_mq_polling(9)
mpt3sas_base_mask_interrupts(9)
mpt3sas_base_unmask_interrupts(9)
_base_process_reply_queue(9)
mpt3sas_blk_mq_poll(9)
_base_interrupt(9)
_base_irqpoll(9)
_base_init_irqpolls(9)
_base_is_controller_msix_enabled(9)
mpt3sas_base_sync_reply_irqs(9)
mpt3sas_base_release_callback_handler(9)
mpt3sas_base_register_callback_handler(9)
mpt3sas_base_initialize_callback_handler(9)
_base_build_zero_len_sge(9)
_base_add_sg_single_32(9)
_base_add_sg_single_64(9)
_base_get_chain_buffer_tracker(9)
_base_build_sg(9)
_base_build_nvme_prp(9)
base_make_prp_nvme(9)
_base_check_pcie_native_sgl(9)
_base_add_sg_single_ieee(9)
_base_build_zero_len_sge_ieee(9)
_base_build_sg_scmd(9)
_base_build_sg_scmd_ieee(9)
_base_build_sg_ieee(9)
_base_config_dma_addressing(9)
_base_check_enable_msix(9)
mpt3sas_base_free_irq(9)
_base_request_irq(9)
_base_assign_reply_queues(9)
_base_check_and_enable_high_iops_queues(9)
mpt3sas_base_disable_msix(9)
_base_alloc_irq_vectors(9)
_base_enable_msix(9)
mpt3sas_base_unmap_resources(9)
mpt3sas_base_check_for_fault_and_issue_reset(9)
mpt3sas_base_map_resources(9)
mpt3sas_base_get_msg_frame(9)
mpt3sas_base_get_sense_buffer(9)
mpt3sas_base_get_sense_buffer_dma(9)
mpt3sas_base_get_pcie_sgl(9)
mpt3sas_base_get_pcie_sgl_dma(9)
mpt3sas_base_get_reply_virt_addr(9)
_base_get_msix_index(9)
_base_get_high_iops_msix_index(9)
mpt3sas_base_get_smid(9)
mpt3sas_base_get_smid_scsiio(9)
mpt3sas_base_get_smid_hpr(9)
mpt3sas_base_free_smid(9)
_base_writeq(9)
_base_set_and_get_msix_index(9)
_base_put_smid_mpi_ep_scsi_io(9)
_base_put_smid_scsi_io(9)
_base_put_smid_fast_path(9)
_base_put_smid_hi_priority(9)
mpt3sas_base_put_smid_nvme_encap(9)
_base_put_smid_default(9)
_base_put_smid_scsi_io_atomic(9)
_base_put_smid_fast_path_atomic(9)
_base_put_smid_hi_priority_atomic(9)
_base_put_smid_default_atomic(9)
_base_display_OEMs_branding(9)
_base_display_fwpkg_version(9)
_base_display_ioc_capabilities(9)
mpt3sas_base_update_missing_delay(9)
_base_update_ioc_page1_inlinewith_perf_mode(9)
_base_get_event_diag_triggers(9)
_base_get_scsi_diag_triggers(9)
_base_get_mpi_diag_triggers(9)
_base_get_master_diag_triggers(9)
_base_check_for_trigger_pages_support(9)
_base_get_diag_triggers(9)
_base_update_diag_trigger_pages(9)
_base_assign_fw_reported_qd(9)
mpt3sas_atto_validate_nvram(9)
mpt3sas_atto_get_sas_addr(9)
mpt3sas_atto_init(9)
_base_static_config_pages(9)
mpt3sas_free_enclosure_list(9)
_base_release_memory_pools(9)
mpt3sas_check_same_4gb_region(9)
_base_reduce_hba_queue_depth(9)
_base_allocate_pcie_sgl_pool(9)
_base_allocate_chain_dma_pool(9)
_base_allocate_sense_dma_pool(9)
_base_allocate_reply_pool(9)
_base_allocate_reply_free_dma_pool(9)
_base_allocate_reply_post_free_array(9)
base_alloc_rdpq_dma_pool(9)
_base_allocate_memory_pools(9)
mpt3sas_base_get_iocstate(9)
_base_wait_on_iocstate(9)
_base_dump_reg_set(9)
_base_wait_for_doorbell_int(9)
_base_wait_for_doorbell_ack(9)
_base_wait_for_doorbell_not_used(9)
_base_send_ioc_reset(9)
mpt3sas_wait_for_ioc(9)
_base_handshake_req_reply_wait(9)
mpt3sas_base_sas_iounit_control(9)
mpt3sas_base_scsi_enclosure_processor(9)
_base_get_port_facts(9)
_base_wait_for_iocstate(9)
_base_get_ioc_facts(9)
_base_send_ioc_init(9)
mpt3sas_port_enable_done(9)
_base_send_port_enable(9)
mpt3sas_port_enable(9)
_base_determine_wait_on_discovery(9)
_base_unmask_events(9)
_base_event_notification(9)
mpt3sas_base_validate_event_type(9)
mpt3sas_base_unlock_and_get_host_diagnostic(9)
mpt3sas_base_lock_host_diagnostic(9)
_base_diag_reset(9)
mpt3sas_base_make_ioc_ready(9)
_base_make_ioc_operational(9)
mpt3sas_base_free_resources(9)
mpt3sas_base_attach(9)
mpt3sas_base_detach(9)
_base_pre_reset_handler(9)
_base_clear_outstanding_mpt_commands(9)
_base_clear_outstanding_commands(9)
_base_reset_done_handler(9)
mpt3sas_wait_for_commands_to_complete(9)
_base_check_ioc_facts_changes(9)
mpt3sas_base_hard_reset_handler(9)

Okay that’s the whole page, bestie. Cute sign-off: this came from ./drivers/scsi/mpt3sas, dated October 2026, and the page is _base_mpi_ep_writeq(9) 💖✨