_base_allocate_reply_pool(9)
π _base_allocate_reply_pool(9) β Kernel API Manual, but make it cute π
Okay so bestie, this is the Kernel API Manual page for _base_allocate_reply_pool(9), and it is exactly what it says on the tin: allocating DMA'able memory for the reply pool. No cap, that's the whole main-character job. β¨
πΈ NAME πΈ
_base_allocate_reply_pool β allocating DMA'able memory for the reply pool. That's it, that's the vibe. π
π οΈ SYNOPSIS π οΈ
The signature is literally giving:
int _base_allocate_reply_pool (struct MPT3SAS_ADAPTER *ioc , u32 sz );
π ARGUMENTS π
iocβ the adapter object, aka the little main character this whole thing hangs around. π«Άszβ the DMA Pool size. Yes, thatsz. Keep it cute and keep it exact. π
π RETURN π
Returns 0 for success and non-zero for failure. That's the vibe check: 0 slays, non-zero is a no. πβ¨
π SEE ALSO π
Kernel file: ./drivers/scsi/mpt3sas/mpt3sas_base.c
And now the whole extended friend group, because apparently we are doing the entire (9) cinematic universe, no skipping, periodt:
mpt3sas_base_check_cmd_timeout(9),_scsih_set_fwfault_debug(9)_base_readl_aero(9),_base_clone_reply_to_sys_mem(9)_base_clone_mpi_to_sys_mem(9),_base_clone_to_sys_mem(9)_base_get_chain(9),_base_get_chain_phys(9),_base_get_buffer_bar0(9)_base_get_buffer_phys_bar0(9)_base_get_chain_buffer_dma_to_chain_buffer(9),_clone_sg_entries(9)mpt3sas_remove_dead_ioc_func(9),_base_sync_drv_fw_timestamp(9)_base_fault_reset_work(9),mpt3sas_base_start_watchdog(9)mpt3sas_base_stop_watchdog(9),mpt3sas_base_fault_info(9)mpt3sas_base_coredump_info(9)mpt3sas_base_wait_for_coredump_completion(9),mpt3sas_halt_firmware(9)_base_sas_ioc_info(9),_base_display_event_data(9)_base_sas_log_info(9),_base_display_reply_info(9)mpt3sas_base_done(9),_base_async_event(9),_base_get_cb_idx(9)mpt3sas_base_pause_mq_polling(9),mpt3sas_base_resume_mq_polling(9)mpt3sas_base_mask_interrupts(9),mpt3sas_base_unmask_interrupts(9)_base_process_reply_queue(9),mpt3sas_blk_mq_poll(9)_base_interrupt(9),_base_irqpoll(9),_base_init_irqpolls(9)_base_is_controller_msix_enabled(9),mpt3sas_base_sync_reply_irqs(9)mpt3sas_base_release_callback_handler(9)mpt3sas_base_register_callback_handler(9)mpt3sas_base_initialize_callback_handler(9)_base_build_zero_len_sge(9),_base_add_sg_single_32(9)_base_add_sg_single_64(9),_base_get_chain_buffer_tracker(9)_base_build_sg(9),_base_build_nvme_prp(9),base_make_prp_nvme(9)_base_check_pcie_native_sgl(9),_base_add_sg_single_ieee(9)_base_build_zero_len_sge_ieee(9),_base_build_sg_scmd(9)_base_build_sg_scmd_ieee(9),_base_build_sg_ieee(9)_base_config_dma_addressing(9),_base_check_enable_msix(9)mpt3sas_base_free_irq(9),_base_request_irq(9)_base_assign_reply_queues(9)_base_check_and_enable_high_iops_queues(9)mpt3sas_base_disable_msix(9),_base_alloc_irq_vectors(9)_base_enable_msix(9),mpt3sas_base_unmap_resources(9)mpt3sas_base_check_for_fault_and_issue_reset(9)mpt3sas_base_map_resources(9),mpt3sas_base_get_msg_frame(9)mpt3sas_base_get_sense_buffer(9),mpt3sas_base_get_sense_buffer_dma(9)mpt3sas_base_get_pcie_sgl(9),mpt3sas_base_get_pcie_sgl_dma(9)mpt3sas_base_get_reply_virt_addr(9),_base_get_msix_index(9)_base_get_high_iops_msix_index(9),mpt3sas_base_get_smid(9)mpt3sas_base_get_smid_scsiio(9),mpt3sas_base_get_smid_hpr(9)mpt3sas_base_free_smid(9),_base_mpi_ep_writeq(9),_base_writeq(9)_base_set_and_get_msix_index(9),_base_put_smid_mpi_ep_scsi_io(9)_base_put_smid_scsi_io(9),_base_put_smid_fast_path(9)_base_put_smid_hi_priority(9),mpt3sas_base_put_smid_nvme_encap(9)_base_put_smid_default(9),_base_put_smid_scsi_io_atomic(9)_base_put_smid_fast_path_atomic(9)_base_put_smid_hi_priority_atomic(9),_base_put_smid_default_atomic(9)_base_display_OEMs_branding(9),_base_display_fwpkg_version(9)_base_display_ioc_capabilities(9),mpt3sas_base_update_missing_delay(9)_base_update_ioc_page1_inlinewith_perf_mode(9)_base_get_event_diag_triggers(9),_base_get_scsi_diag_triggers(9)_base_get_mpi_diag_triggers(9),_base_get_master_diag_triggers(9)_base_check_for_trigger_pages_support(9),_base_get_diag_triggers(9)_base_update_diag_trigger_pages(9),_base_assign_fw_reported_qd(9)mpt3sas_atto_validate_nvram(9),mpt3sas_atto_get_sas_addr(9)mpt3sas_atto_init(9),_base_static_config_pages(9)mpt3sas_free_enclosure_list(9),_base_release_memory_pools(9)mpt3sas_check_same_4gb_region(9),_base_reduce_hba_queue_depth(9)_base_allocate_pcie_sgl_pool(9),_base_allocate_chain_dma_pool(9)_base_allocate_sense_dma_pool(9),_base_allocate_reply_free_dma_pool(9)_base_allocate_reply_post_free_array(9),base_alloc_rdpq_dma_pool(9)_base_allocate_memory_pools(9),mpt3sas_base_get_iocstate(9)_base_wait_on_iocstate(9),_base_dump_reg_set(9)_base_wait_for_doorbell_int(9),_base_wait_for_doorbell_ack(9)_base_wait_for_doorbell_not_used(9),_base_send_ioc_reset(9)mpt3sas_wait_for_ioc(9),_base_handshake_req_reply_wait(9)mpt3sas_base_sas_iounit_control(9)mpt3sas_base_scsi_enclosure_processor(9),_base_get_port_facts(9)_base_wait_for_iocstate(9),_base_get_ioc_facts(9)_base_send_ioc_init(9),mpt3sas_port_enable_done(9)_base_send_port_enable(9),mpt3sas_port_enable(9)_base_determine_wait_on_discovery(9),_base_unmask_events(9)_base_event_notification(9),mpt3sas_base_validate_event_type(9)mpt3sas_base_unlock_and_get_host_diagnostic(9)mpt3sas_base_lock_host_diagnostic(9),_base_diag_reset(9)mpt3sas_base_make_ioc_ready(9),_base_make_ioc_operational(9)mpt3sas_base_free_resources(9),mpt3sas_base_attach(9)mpt3sas_base_detach(9),_base_pre_reset_handler(9)_base_clear_outstanding_mpt_commands(9)_base_clear_outstanding_commands(9),_base_reset_done_handler(9)mpt3sas_wait_for_commands_to_complete(9)_base_check_ioc_facts_changes(9),mpt3sas_base_hard_reset_handler(9)
Cute little sign-off time: this page is from ./drivers/scsi/mpt3sas, October 2026 edition, and the page header is _base_allocate_reply_pool(9) β bye bestie, stay DMA'able π
β¨π¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms