BOOM(1)

πŸ“¦ version 5.1.1, in fedora 43, fedora 44

πŸ’– BOOM β€” it's giving BOOlean Minimization πŸ’–

okay bestie, sit down, hydrate, because we're about to talk about BOOM from the CAO-VLSI Reference Manual (that's section 1 of the manual, iykyk). She's a whole icon and she's about to carry your synthesis pipeline on her back. 🫢


🌸 ORIGIN 🌸

This software belongs to the ALLIANCE CAD SYSTEM, developed by the ASIM team at LIP6 laboratory of UniversitΓ© Pierre et Marie CURIE, in Paris, France. πŸ’…


✨ SYNOPSIS ✨

boom [-VTOAP] [-l num] [-d num] [-i num] [-a num] [-sjbgpwtmorn]
               filename [outname]

πŸ¦‹ DESCRIPTION πŸ¦‹

So BOOM is literally the first step of the synthesis process, main character energy fr fr. She optimizes a behavioural description using a Reduced Ordered Binary Decision Diagram representation of logic functions. 😭 iconic.

The file filename is your input behavioural description, and bestie, it must be written in vbe(5) format. no cap.

The resulting behavioural optimized description gets saved with the name outname β€” or, if you don't give her one, as input_name_o β€” also in vbe(5) format. πŸ’–


πŸŽ€ ENVIRONMENT VARIABLES πŸŽ€

  • MBK_WORK_LIB(1) β€” indicates the path to the read/write directory for the session. πŸ—‚οΈ

πŸ‘‘ OPTIONS πŸ‘‘

  • -V β€” Verbose mode on. Every single step of the optimization gets displayed on the standard output. she's chatty and we love that. πŸ—£οΈ
  • -T β€” Trace mode on. Some debug information is displayed on the standard output. πŸ•΅οΈβ™€οΈ
  • -O β€” Reverses the initial Bdd variables order. plot twist energy. πŸ”„
  • -A β€” BOOM performs a local optimization and keeps the architecture of the initial description by saving most of the intermediate signals. This mode is well-suited for big or regular circuits such as multipliers, adders. By default, BOOM performs a global optimization and removes most of the intermediate signals so that the outputs are expressed in terms of the inputs or the internal registers β€” this mode is well-suited for random circuits such as FSMs. two completely different vibes, pick your fighter. πŸ’€
  • -P β€” Uses a parameter file input_name.boom describing optimization directives and constraints. (see below for the exact syntax πŸ‘‡)
# Example of .boom file

#
# The list of auxiliary signals that have to be kept
# during optimization.
# Generally carry signals, ram address signals etc ...
#
BEGIN_KEEP

carry[3:0]
ram_address[3:0]

END

#
# The list of auxiliary signals which assigned
# expression won't be modified.
# Generally it's ram output signals.
#
BEGIN_DONT_TOUCH
ram_out[7:0]
END
  • -l num β€” Specifies the optimization level [0-3] (default is 0, low level). πŸ“
  • -d num β€” Specifies the delay optimization percent (default is 0% delay, 100% surface). the eternal tradeoff, we stay torn. βš–οΈ
  • -i num β€” Specifies the number of iterations for the chosen optimization algorithm (for experts only). πŸ”₯
  • -a num β€” Specifies the amplitude during bdd reordering (for experts only). πŸ”₯
  • -sjbgpwtmorn β€” Specifies which algorithm has to be used for the boolean optimization. the way she just bundled a whole alphabet together... πŸ’…
ngl bestie, if you're out here reaching for -i or -a without being an expert, maybe take a lil vibe check first. πŸ™ˆ

🌈 SEE ALSO 🌈

boom(5), vbe(5), asimut(1), boog(1), MBK_WORK_LIB(1).


πŸ’œ BUG REPORT πŸ’œ

This tool is under development at the ASIM department of the LIP6 laboratory. We need your feedback to improve documentation and tools. 🫢


and that's the whole page, periodt. πŸ’…βœ¨

this absolute banger of a manpage was served to you by ASIM/LIP6, dated August 25, 2000. yes she's vintage, yes she still eats. πŸŽ€πŸ¦‹πŸ’–